XV

Xavier Vera

IN Intel: 29 patents #1,299 of 30,777Top 5%
Overall (All Time): #131,102 of 4,157,543Top 4%
29
Patents All Time

Issued Patents All Time

Showing 25 most recent of 29 patents

Patent #TitleCo-InventorsDate
10528473 Disabling cache portions during low voltage operations Christopher B. Wilkerson, Muhammad M. Khellah, Vivek K. De, Ming Zhang, Jaume Abella +3 more 2020-01-07
10020037 Capacity register file Jaume Abella, Javier Carretero Casado, Pedro Chaparro Monferrer 2018-07-10
9678878 Disabling cache portions during low voltage operations Christopher B. Wilkerson, Muhammad M. Khellah, Vivek K. De, Ming Zhang, Jaume Abella +3 more 2017-06-13
9619309 Enforcing different operational configurations for different tasks for failure rate based control of processors Enric Herrero Abellanas, Nicholas Axelos, Javier Carretero Casado, Tanausu Ramirez, Daniel Sanchez Pedreño 2017-04-11
9608922 Traffic control on an on-chip network Matteo Monchiero, Javier Carretero Casado, Enric Herrero Abellanas, Tanausu Ramirez 2017-03-28
9405647 Register error protection through binary translation Javier Carretero Casado, Matteo Monchiero, Tanausu Ramirez, Enric Herrero 2016-08-02
9286172 Fault-aware mapping for shared last level cache (LLC) Tanausu Ramirez, Javier Carretero Casado, Enric Herrero, Matteo Monchiero 2016-03-15
9176895 Increased error correction for cache memories through adaptive replacement policies Javier Carretero Casado, Enric Herrero Abellanas, Daniel Sanchez, Nicholas Axelos, Tanausu Ramirez 2015-11-03
9170947 Recovering from data errors using implicit redundancy Matteo Monchiero, Javier Carretero Casado, Enric Herrero, Tanausu Ramirez 2015-10-27
9112537 Content-aware caches for reliability Tanausu Ramirez, Javier Carretero Casado, Enric Herrero, Matteo Monchiero 2015-08-18
9075904 Vulnerability estimation for cache memory Javier Carretero Casado, Tanausu Ramirez, Daniel Sanchez, Enric Herrero Abellanas, Nicholas Axelos 2015-07-07
9071281 Selective provision of error correction for memory Javier Carretero Casado, Daniel Sanchez, Tanausu Ramirez, Enric Herrero Abellanas, Nicholas Axelos 2015-06-30
9043659 Banking of reliability metrics Enric Herrero Abellanas, Javier Carretero Casado, Tanausu Ramirez, Nicholas Axelos, Daniel Sanchez 2015-05-26
8578137 Reducing aging effect on registers Jaume Abella, Antonio Gonzalez 2013-11-05
8477558 Memory apparatuses with low supply voltages Jaume Abella, Javier Carretero Casado, Pedro Chaparro Monferrer, Antonio Gonzalez 2013-07-02
8402310 Detecting soft errors via selective re-execution Oguz Ergin, Osman Unsal, Jaume Abella, Antonio Gonzalez 2013-03-19
8352812 Protecting data storage structures from intermittent errors Jaume Abella, Javier Carretero Casado, Antonio Gonzalez 2013-01-08
8291168 Disabling cache portions during low voltage operations Christopher B. Wilkerson, Muhammad M. Khellah, Vivek K. De, Ming Zhang, Jaume Abella +3 more 2012-10-16
8151094 Dynamically estimating lifetime of a semiconductor device Jaume Abella, Osman Unsal, Oguz Ergin, Antonio Gonzalez 2012-04-03
8103830 Disabling cache portions during low voltage operations Christopher B. Wilkerson, Muhammad M. Khellah, Vivek K. De, Ming Zhang, Jaume Abella +3 more 2012-01-24
8090996 Detecting soft errors via selective re-execution Oguz Ergin, Osman Unsal, Jaume Abella, Antonio Gonzalez 2012-01-03
8074110 Enhancing reliability of a many-core processor Osman Unsal, Oguz Ergin, Jaume Abella, Antonio Gonzalez 2011-12-06
8069376 On-line testing for decode logic Pedro Chaparro Monferrer, Jaume Abella, Javier Carretero Casado 2011-11-29
7747913 Correcting intermittent errors in data storage structures Jaume Abella, Javier Carretero Casado 2010-06-29
7689804 Selectively protecting a register file Jaume Abella, Jose-Alejandro Pineiro, Antonio Gonzalez, Ronny Ronen 2010-03-30