Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9804920 | Rank and page remapping logic in a volatile memory | Zhan Ping | 2017-10-31 |
| 9608922 | Traffic control on an on-chip network | Javier Carretero Casado, Enric Herrero Abellanas, Tanausu Ramirez, Xavier Vera | 2017-03-28 |
| 9405647 | Register error protection through binary translation | Xavier Vera, Javier Carretero Casado, Tanausu Ramirez, Enric Herrero | 2016-08-02 |
| 9286172 | Fault-aware mapping for shared last level cache (LLC) | Tanausu Ramirez, Javier Carretero Casado, Enric Herrero, Xavier Vera | 2016-03-15 |
| 9262306 | Software application testing | Filippo Balestrieri | 2016-02-16 |
| 9170947 | Recovering from data errors using implicit redundancy | Xavier Vera, Javier Carretero Casado, Enric Herrero, Tanausu Ramirez | 2015-10-27 |
| 9112537 | Content-aware caches for reliability | Tanausu Ramirez, Javier Carretero Casado, Enric Herrero, Xavier Vera | 2015-08-18 |
| 8907462 | Integrated circuit package | Jacob Leverich, Parthasarathy Ranganathan, Norman Paul Jouppi, Vanish Talwar | 2014-12-09 |
| 8396953 | Processing packets using a virtualized descriptor queue | Jen-Cheng Huang, Yoshio Turner | 2013-03-12 |
| 8392761 | Memory checkpointing using a co-located processor and service processor | Naveen Muralimanohar, Partha Ranganathan | 2013-03-05 |
| 8312126 | Managing at least one computer node | Parthasarathy Ranganathan, Vanish Talwar | 2012-11-13 |
| 8122125 | Deep packet inspection (DPI) using a DPI core | Jayaram Mudigonda, Yoshio Turner | 2012-02-21 |