VS

Valeriy Sukharev

Lsi Logic: 16 patents #84 of 1,957Top 5%
MG Mentor Graphics: 5 patents #69 of 698Top 10%
LS Lsi: 1 patents #914 of 1,740Top 55%
Overall (All Time): #196,101 of 4,157,543Top 5%
22
Patents All Time

Issued Patents All Time

Showing 1–22 of 22 patents

Patent #TitleCo-InventorsDate
10013523 Full-chip assessment of time-dependent dielectric breakdown Xin-Hua Huang 2018-07-03
9836569 Leakage reduction using stress-enhancing filler cells Junho Choy, Armen Kteyan, Henrik Hovsepyan 2017-12-05
9740804 Chip-scale electrothermal analysis Armen Kteyan, Junho Choy, Henrik Hovsepyan 2017-08-22
9135391 Determination of electromigration susceptibility based on hydrostatic stress analysis Patrick D. Gibson, William Matthew Hogan, Sridhar Srinivasan 2015-09-15
7687303 Method for determining via/contact pattern density effect in via/contact etch rate Ara Markosian 2010-03-30
7408227 Apparatus and method of manufacture for integrated circuit and CMOS device including epitaxially grown dielectric on silicon carbide Mohammad Mirabedini 2008-08-05
7138292 Apparatus and method of manufacture for integrated circuit and CMOS device including epitaxially grown dielectric on silicon carbide Mohammad Mirabedini 2006-11-21
6935933 Viscous electropolishing system Wilbur G. Catabay 2005-08-30
6777807 Interconnect integration Wilbur G. Catabay, Hongqiang Lu 2004-08-17
6759337 Process for etching a controllable thickness of oxide on an integrated circuit structure on a semiconductor substrate using nitrogen plasma and plasma and an rf bias applied to the substrate Sheldon Aronowitz, John Haywood, James Kimball, Helmut Puchner, Ravindra M. Kapre +1 more 2004-07-06
6524974 FORMATION OF IMPROVED LOW DIELECTRIC CONSTANT CARBON-CONTAINING SILICON OXIDE DIELECTRIC MATERIAL BY REACTION OF CARBON-CONTAINING SILANE WITH OXIDIZING AGENT IN THE PRESENCE OF ONE OR MORE REACTION RETARDANTS 2003-02-25
6506678 Integrated circuit structures having low k porous aluminum oxide dielectric material separating aluminum lines, and method of making same 2003-01-14
6426286 Interconnection system with lateral barrier layer Richard Schinella 2002-07-30
6365528 LOW TEMPERATURE PROCESS FOR FORMING A LOW DIELECTRIC CONSTANT FLUORINE AND CARBON-CONTAINING SILICON OXIDE DIELECTRIC-MATERIAL CHARACTERIZED BY IMPROVED RESISTANCE TO OXIDATION AND GOOD GAP-FILLING CAPABILITIES Vladimir Zubkov 2002-04-02
6303047 Low dielectric constant multiple carbon-containing silicon oxide dielectric material for use in integrated circuit structures, and method of making same Sheldon Aronowitz, Vladimir Zubkov 2001-10-16
6147012 Process for forming low k silicon oxide dielectric material while suppressing pressure spiking and inhibiting increase in dielectric constant Wei-Jen Hsia 2000-11-14
6114259 Process for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damage Warren M. Uesato, John Hu, Wei-Jen Hsia, Linggian Qian 2000-09-05
6087229 Composite semiconductor gate dielectrics Sheldon Aronowitz, David Chan, James Kimball, David Lee, John Haywood 2000-07-11
6033998 Method of forming variable thickness gate dielectrics Sheldon Aronowitz, David Chan, James Kimball, David Lee, John Haywood 2000-03-07
6030460 Method and apparatus for forming dielectric films 2000-02-29
5837598 Diffusion barrier for polysilicon gate electrode of MOS device in integrated circuit structure, and method of making same Sheldon Aronowitz, Jon S. Owyang, John Haywood 1998-11-17
5710079 Method and apparatus for forming dielectric films 1998-01-20