SR

Srivaths Ravi

TI Texas Instruments: 8 patents #1,843 of 12,488Top 15%
NA Nec Laboratories America: 3 patents #109 of 412Top 30%
NE Nec: 2 patents #7,889 of 14,502Top 55%
Overall (All Time): #374,566 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11333707 Testing of integrated circuits during at-speed mode of operation Khushboo Agarwal, Sanjay Krishna Hulical Vijayaraghavachar, Raashid Moin Shaikh, Wilson Pradeep, Rajesh Tiwari 2022-05-17
8856601 Scan compression architecture with bypassable scan chains for low test mode power Rajesh Tiwari, Rubin Ajit Parekhji 2014-10-07
8839063 Circuits and methods for dynamic allocation of scan test resources Rubin Ajit Parekhji, Prakash Narayanan, Milan Shetty 2014-09-16
8671329 Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processes Sanjay Kumar, Amit Kumar Dutta, Rubin Ajit Parekhji 2014-03-11
8527821 Hybrid test compression architecture using multiple codecs for low pin count and high compression devices Malav Shrikant Shah, Swathi Gangasani 2013-09-03
8438344 Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processes Sanjay Kumar, Amit Kumar Dutta, Rubin Ajit Parekhji 2013-05-07
8286042 On-chip seed generation using boolean functions for LFSR re-seeding based logic BIST techniques for low cost field testability Swathi Gangasani, Srinivasulu Alampally, Divya Divakaran, Rubin Ajit Parekhji, Amit Kumar Dutta 2012-10-09
8205125 Enhanced control in scan tests of integrated circuits with partitioned scan chains Alan Hales, Srujan Kumar Nakidi, Rubin Ajit Parekhji, Rajesh Tiwari 2012-06-19
7529669 Voice-based multimodal speaker authentication using adaptive training and applications thereof Anand Raghunathan, Srimat Chakradhar, Karthik Nandakumar 2009-05-05
7278123 System-level test architecture for delivery of compressed tests Anand Raghunathan, Loganathan Lingappan, Srimat Chakradhar, Niraj K. Jha 2007-10-02
7260809 Power estimation employing cycle-accurate functional descriptions Anand Raghunathan, Lin Zhong, Niraj K. Jha 2007-08-21
7173906 Flexible crossbar switching fabric Anand Raghunathan, Jacob Chang 2007-02-06
7134100 Method and apparatus for efficient register-transfer level (RTL) power estimation Anand Raghunathan, Srimat Chakradhar 2006-11-07