Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5465859 | Dual phase and hybrid phase shifting mask fabrication using a surface etch monitoring technique | Jonathan D. Chapple-Sokol, Louis L. Hsu, Chi-Min Yuan | 1995-11-14 |
| 5374590 | Fabrication and laser deletion of microfuses | Kerry L. Batdorf, Richard A. Gilmour | 1994-12-20 |
| 5340775 | Structure and fabrication of SiCr microfuses | Roy A. Carruthers, Fernand Dorleans, John A. Fitzsimmons, Richard Flitsch, James A. Jubinsky +3 more | 1994-08-23 |
| 5285099 | SiCr microfuses | Roy A. Carruthers, Fernand Dorleans, John A. Fitzsimmons, Richard Flitsch, James A. Jubinsky +3 more | 1994-02-08 |
| 5241203 | Inverse T-gate FET transistor with lightly doped source and drain region | Louis L. Hsu, Seiki Ogura, Joseph F. Shepard, Jr. | 1993-08-31 |
| 5120668 | Method of forming an inverse T-gate FET transistor | Louis L. Hsu, Seiki Ogura, Joseph F. Shepard, Jr. | 1992-06-09 |
| 5015594 | Process of making BiCMOS devices having closely spaced device regions | Shao-fu Sanford Chu, San-Mei Ku, Russell C. Lange, Joseph F. Shephard, Wen-Yuan Wang | 1991-05-14 |
| 4960717 | Fabrication of dielectrically isolated integrated circuit devices | Victor J. Silvestri | 1990-10-02 |
| 4908691 | Selective epitaxial growth structure and isolation | Victor J. Silvestri | 1990-03-13 |
| 4890287 | On-the-fly error correction | Bruce E. Johnson | 1989-12-26 |
| 4728624 | Selective epitaxial growth structure and isolation | Victor J. Silvestri | 1988-03-01 |
| 4583106 | Fabrication methods for high performance lateral bipolar transistors | Narasipur G. Anantha, Jacob Riseman | 1986-04-15 |
| 4546536 | Fabrication methods for high performance lateral bipolar transistors | Narasipur G. Anantha, Jacob Riseman | 1985-10-15 |
| 4510676 | Method of fabricating a lateral PNP transistor | Narasipur G. Anantha, Santosh P. Gaur, Yi-Shiou Huang | 1985-04-16 |
| 4492008 | Methods for making high performance lateral bipolar transistors | Narasipur G. Anantha, Tak H. Ning | 1985-01-08 |
| 4442589 | Method for manufacturing field effect transistors | Ven Y. Doo | 1984-04-17 |
| 4419809 | Fabrication process of sub-micrometer channel length MOSFETs | Jacob Riseman | 1983-12-13 |
| 4403394 | Formation of bit lines for ram device | Joseph F. Shepard, Jr. | 1983-09-13 |
| 4392149 | Bipolar transistor | Cheng T. Horng, Robert O. Schwenker | 1983-07-05 |
| 4366613 | Method of fabricating an MOS dynamic RAM with lightly doped drain | Seiki Ogura | 1983-01-04 |
| 4309812 | Process for fabricating improved bipolar transistor utilizing selective etching | Cheng T. Horng, Robert O. Schwenker | 1982-01-12 |