Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7618857 | Method of reducing detrimental STI-induced stress in MOSFET channels | Qiqing C. Ouyang, Chun-Yung Sung | 2009-11-17 |
| 7439109 | Method of forming an integrated circuit structure on a hybrid crystal oriented substrate | Brent A. Anderson, Edward J. Nowak | 2008-10-21 |
| 7250658 | Hybrid planar and FinFET CMOS devices | Bruce B. Doris, Diane C. Boyd, Thomas S. Kanarsky, Jakub Kedzierski, Min Yang | 2007-07-31 |
| 7161169 | Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain | Victor Chan, Massimo V. Fischetti, John Michael Hergenrother, Rajesh Rengarajan, Alexander Reznicek +3 more | 2007-01-09 |
| 7148559 | Substrate engineering for optimum CMOS device performance | Victor Chan, Min Yang | 2006-12-12 |
| 6998684 | High mobility plane CMOS SOI | Brent A. Anderson, Edward J. Nowak | 2006-02-14 |
| 6846734 | Method and process to make multiple-threshold metal gates CMOS technology | Ricky S. Amos, Katayun Barmak, Diane C. Boyd, Cyril Cabral, Jr., Thomas S. Kanarsky +1 more | 2005-01-25 |