Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11075339 | Correlated electron material (CEM) devices with contact region sidewall insulation | Ming He, Paul R. Besser, Jingyan Zhang | 2021-07-27 |
| 10707415 | Methods and processes for forming devices from correlated electron material (CEM) | Lucian Shifren, Kimberly Gay Reid, Gregory Munson Yeric, Glen Arnold Rosendale | 2020-07-07 |
| 10672982 | Fabrication of correlated electron material (CEM) devices | Ming He, Paul R. Besser, Jingyan Zhang | 2020-06-02 |
| 10141504 | Methods and processes for forming devices from correlated electron material (CEM) | Lucian Shifren, Kimberly Gay Reid, Greg Yeric, Glen Arnold Rosendale | 2018-11-27 |
| 9343666 | Damascene metal-insulator-metal (MIM) device with improved scaleability | Suzette K. Pangrle, Steven C. Avanzino, Sameer Haddad, Michael VanBuskirk, James J. Xie +5 more | 2016-05-17 |
| 8803120 | Diode and resistive memory device structures | An-Chung Chen, Steven C. Avanzino, Suzette K. Pangrle | 2014-08-12 |
| 8717803 | Metal-insulator-metal-insulator-metal (MIMIM) memory device | Suzette K. Pangrle, Steven C. Avanzino, Zhida Lan | 2014-05-06 |
| 8373148 | Memory device with improved performance | Zhida Lan, Joffre F. Bernard | 2013-02-12 |
| 8232175 | Damascene metal-insulator-metal (MIM) device with improved scaleability | Suzette K. Pangrle, Steven C. Avanzino, Sameer Haddad, Michael VanBuskirk, James J. Xie +5 more | 2012-07-31 |
| 8093698 | Gettering/stop layer for prevention of reduction of insulating oxide in metal-insulator-metal device | Matthew S. Buynoski, Joffre F. Bernard, Steven C. Avanzino, Suzette K. Pangrle | 2012-01-10 |
| 8093680 | Metal-insulator-metal-insulator-metal (MIMIM) memory device | Suzette K. Pangrle, Steven C. Avanzino, Zhida Lan | 2012-01-10 |
| 8089113 | Damascene metal-insulator-metal (MIM) device | Suzette K. Pangrle, Steven C. Avanzino, Sameer Haddad, Michael VanBuskirk, James J. Xie +5 more | 2012-01-03 |
| 8084770 | Test structures for development of metal-insulator-metal (MIM) devices | Steven C. Avanzino, Suzette K. Pangrle, An-Chung Chen, Sameer Haddad, Nicholas H. Tripsas +1 more | 2011-12-27 |
| 8035099 | Diode and resistive memory device structures | An-Chung Chen, Steven C. Avanzino, Suzette K. Pangrle | 2011-10-11 |
| 7772077 | Method of forming a semiconductor structure comprising a field effect transistor having a stressed channel region | Andreas Gehring, Andy Wei, Anthony Mowry | 2010-08-10 |
| 7468525 | Test structures for development of metal-insulator-metal (MIM) devices | Steven C. Avanzino, Suzette K. Pangrle, An-Chung Chen, Sameer Haddad, Nicholas H. Tripsas +1 more | 2008-12-23 |
| 7323377 | Increasing self-aligned contact areas in integrated circuits using a disposable spacer | Mehran Sedigh, Alain Blosse, Dutta Saurabh Chowdhury | 2008-01-29 |
| 6969689 | Method of manufacturing an oxide-nitride-oxide (ONO) dielectric for SONOS-type devices | Krishnaswamy Ramkumar, Biju Parameshwaran, Loren T. Lancaster | 2005-11-29 |
| 6818558 | Method of manufacturing a dielectric layer for a silicon-oxide-nitride-oxide-silicon (SONOS) type devices | Krishnaswamy Ramkumar, Fred Jenne, Loren T. Lancaster | 2004-11-16 |
| 6624052 | Process for annealing semiconductors and/or integrated circuits | Krishnaswamy Ramkumar | 2003-09-23 |
| 6436799 | Process for annealing semiconductors and/or integrated circuits | Krishnaswamy Ramkumar | 2002-08-20 |
| 6372634 | Plasma etch chemistry and method of improving etch control | Jianmin Qiao, Sanjay Thekdi, James E. Nulty | 2002-04-16 |