Issued Patents All Time
Showing 25 most recent of 108 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417944 | Formation of trench silicide source or drain contacts without gate damage | Andrew M. Greene, Ruilong Xie, Veeraraghavan S. Basker, Chanro Park, Hui Zang | 2025-09-16 |
| 11456382 | Transistor comprising an air gap positioned adjacent a gate electrode | Shesh Mani Pandey, Hui Zang, Haiting Wang, Jinping Liu | 2022-09-27 |
| 11443982 | Formation of trench silicide source or drain contacts without gate damage | Andrew M. Greene, Ruilong Xie, Veeraraghavan S. Basker, Chanro Park, Hui Zang | 2022-09-13 |
| 10998422 | Methods, apparatus and system for a self-aligned gate cut on a semiconductor device | Hui Zang, Ruilong Xie | 2021-05-04 |
| 10937786 | Gate cut structures | Hui Zang, Ruilong Xie | 2021-03-02 |
| 10923469 | Vertical resistor adjacent inactive gate over trench isolation | Hui Zang, Guowei Xu, Jiehui Shu, Ruilong Xie, Yurong Wen +2 more | 2021-02-16 |
| 10879073 | Insulating gate separation structure for transistor devices | Chanro Park, Ruilong Xie, Hui Zang, Andre P. Labonte | 2020-12-29 |
| 10790363 | IC structure with metal cap on cobalt layer and methods of forming same | Kevin J. Ryan, Ruilong Xie, Hui Zang | 2020-09-29 |
| 10741656 | Wraparound contact surrounding source/drain regions of integrated circuit structures and method of forming same | Hui Zang, Ruilong Xie, Shesh Mani Pandey | 2020-08-11 |
| 10741451 | FinFET having insulating layers between gate and source/drain contacts | Hui Zang, Shesh Mani Pandey, Chanro Park, Ruilong Xie | 2020-08-11 |
| 10727136 | Integrated gate contact and cross-coupling contact formation | Hui Zang, Ruilong Xie, Chanro Park | 2020-07-28 |
| 10707206 | Gate cut isolation formed as layer against sidewall of dummy gate mandrel | Hui Zang, Ruilong Xie | 2020-07-07 |
| 10699957 | Late gate cut using selective dielectric deposition | Hui Zang, Ruilong Xie, Jiehui Shu, Chanro Park | 2020-06-30 |
| 10586860 | Method of manufacturing finfet devices using narrow and wide gate cut openings in conjunction with a replacement metal gate process | Jiehui Shu, Xusheng Wu, John H. Zhang, Haigou Huang, Hui Zhan +4 more | 2020-03-10 |
| 10580685 | Integrated single diffusion break | Hui Zang, Haiting Wang, Hong Yu | 2020-03-03 |
| 10573753 | Oxide spacer in a contact over active gate finFET and method of production thereof | Hui Zang, Jiehui Shu, Ruilong Xie | 2020-02-25 |
| 10566201 | Gate cut method after source/drain metallization | Chanro Park, Ruilong Xie, Hui Zang, Andre P. Labonte | 2020-02-18 |
| 10553698 | Methods, apparatus and system for a self-aligned gate cut on a semiconductor device | Hui Zang, Ruilong Xie | 2020-02-04 |
| 10553486 | Field effect transistors with self-aligned metal plugs and methods | Hui Zang, Ruilong Xie | 2020-02-04 |
| 10546853 | Metal resistors integrated into poly-open-chemical-mechanical-polishing (POC) module and method of production thereof | Hui Zang, Ruilong Xie | 2020-01-28 |
| 10535771 | Method for forming replacement air gap | Shesh Mani Pandey, Hui Zang, Haiting Wang, Jinping Liu | 2020-01-14 |
| 10522410 | Performing concurrent diffusion break, gate and source/drain contact cut etch processes | Hui Zang, Ruilong Xie, Haiting Wang, Hong Yu | 2019-12-31 |
| 10522538 | Using source/drain contact cap during gate cut | Haiting Wang, Shesh Mani Pandey, Jiehui Shu, Hui Zang, Ruilong Xie +2 more | 2019-12-31 |
| 10510613 | Contact structures | Jiehui Shu, Xusheng Wu, Haigou Huang, John H. Zhang, Pei Liu | 2019-12-17 |
| 10510749 | Resistor within single diffusion break, and related method | Hui Zang, Ruilong Xie, Garo Derderian | 2019-12-17 |