JC

Jonathan Y. Chen

IBM: 13 patents #8,581 of 70,183Top 15%
University Of Texas System: 5 patents #550 of 6,559Top 9%
PO Process Research Ortech: 2 patents #4 of 15Top 30%
Overall (All Time): #217,841 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11970820 Cotton recycling 2024-04-30
11525214 Cotton recycling 2022-12-13
11351751 Noise-absorbent and odor-adsorbent fabric cover systems for vehicle interiors 2022-06-07
10727003 Cord-yarn structured supercapacitor Yuxiang Huang, Yue Liu 2020-07-28
10199180 Fabric supercapacitor Yuxiang Huang, Yue Liu 2019-02-05
10053750 Recovery of nickel in leaching of laterite ores Vaikuntam I. Lakshmanan, Ramamritham Sridhar, Md. Abdul Halim, Robert J. DeLaat 2018-08-21
8916116 Separation of iron from value metals in leaching of laterite ores Vaikuntam I. Lakshmanan, Ramamritham Sridhar, M. A. Halim, Robert J. DeLaat 2014-12-23
8108821 Reduction of logic and delay through latch polarity inversion Jose L. Neves 2012-01-31
8103989 Method and system for changing circuits in an integrated circuit Nathan A. Dotson, David L. Rude, Vern A. Victoria 2012-01-24
7882322 Early directory access of a double data rate elastic interface Christopher J. Berry, Michael Fee, Patrick J. Meaney, Alan P. Wagstaff 2011-02-01
7783911 Programmable bus driver launch delay/cycle delay to reduce elastic interface elasticity requirements Patrick J. Meaney, Gary A. Van Huben, David A. Webber 2010-08-24
7752475 Late data launch for a double data rate elastic interface Christopher J. Berry, Michael Fee, Patrick J. Meaney, Alan P. Wagstaff 2010-07-06
7739538 Double data rate chaining for synchronous DDR interfaces Michael Fee, Patrick J. Meaney, Christopher J. Berry, Alan P. Wagstaff 2010-06-15
7739545 System and method to support use of bus spare wires in connection modules Mark A. Check, Thomas G. Foote, Timothy J. Slegel 2010-06-15
7734944 Mechanism for windaging of a double rate driver Jeffrey A. Magee, David A. Webber 2010-06-08
7254656 Method and service and computer program code for broadcast of interface group bring-up in a multiprocessor computer system having multiple nodes Derrin M. Berger, Thomas E. Gilbert 2007-08-07
6954870 Method for receiver delay detection and latency minimization for a source synchronous wave pipelined interface Frank D. Ferraiolo, Kevin C. Gower, Patrick J. Meaney, William J. Scarpero, Jr. 2005-10-11
6934867 Digital system having a multiplicity of self-calibrating interfaces Patrick J. Meaney, William J. Scarpero, Jr. 2005-08-23
6922789 Apparatus and method for recalibrating a source-synchronous pipelined self-timed bus interface Patrick J. Meaney, Frank D. Ferraiolo, Kevin C. Gower, Glenn E. Holmes 2005-07-26
6892314 Method and system of automatic delay detection and receiver adjustment for synchronous bus interface 2005-05-10