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Error protection for a data bus |
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2015-12-01 |
| 9041428 |
Placement of storage cells on an integrated circuit |
William V. Huott, Kevin W. Kark, John G. Massey, K. Paul Muller, David Wolpert |
2015-05-26 |
| 9043683 |
Error protection for integrated circuits |
William V. Huott, Kevin W. Kark, John G. Massey, K. Paul Muller, David Wolpert |
2015-05-26 |
| 9021328 |
Shared error protection for register banks |
William V. Huott, Kevin W. Kark, John G. Massey, K. Paul Muller, David Wolpert |
2015-04-28 |
| 8122400 |
Logic difference synthesis |
Jeremy T. Hopkins, John M. Isakson, Joachim Keinert, Smita Krishnaswamy, Nilesh A. Modi +2 more |
2012-02-21 |
| 8103989 |
Method and system for changing circuits in an integrated circuit |
Nathan A. Dotson, Jonathan Y. Chen, Vern A. Victoria |
2012-01-24 |
| 7469399 |
Semi-flattened pin optimization process for hierarchical physical designs |
Christopher J. Berry, Christopher M. Carney, Eddy St. Juste |
2008-12-23 |
