Patents per Year
Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 6922789 | Apparatus and method for recalibrating a source-synchronous pipelined self-timed bus interface | Patrick J. Meaney, Jonathan Y. Chen, Frank D. Ferraiolo, Kevin C. Gower | 2005-07-26 | $7,521,000 |
| 6799309 | Method for optimizing a VLSI floor planner using a path based hyper-edge representation | Nagashyamala R. Dhanwada, Joseph Morrell, Jose L. Neves, Natesan Venkateswaran | 2004-09-28 | $8,392,000 |
| 6748565 | System and method for adjusting timing parts | Timothy G. McNamara, William J. Scarpero, Jr. | 2004-06-08 | $6,083,000 |
| 5905410 | Lock/unlock indicator for PLL circuits | Timothy G. McNamara, Paul D. Muench | 1999-05-18 | $41,093,000 |
| 5347465 | Method of integrated circuit chips design | Raymond J. Ferreri, Steven Magdo | 1994-09-13 | $13,331,000 |