| 8384165 |
Application of gate edge liner to maintain gate length CD in a replacement gate transistor flow |
Richard J. Carter, Wai Lo, Sey-Shing Sun, Verne Hornback |
2013-02-26 |
| 7553772 |
Process and apparatus for simultaneous light and radical surface treatment of integrated circuit structure |
Shiqun Gu, Wai Lo |
2009-06-30 |
| 7405116 |
Application of gate edge liner to maintain gate length CD in a replacement gate transistor flow |
Richard J. Carter, Wai Lo, Sey-Shing Sun, Verne Hornback |
2008-07-29 |
| 7365015 |
Damascene replacement metal gate process with controlled gate profile and length using Si1-xGex as sacrificial material |
Wai Lo, Sey-Shing Sun, Richard J. Carter |
2008-04-29 |
| 7341978 |
Superconductor wires for back end interconnects |
Shiqun Gu, Wai Lo |
2008-03-11 |
| 7259462 |
Interconnect dielectric tuning |
Wai Lo, Shiqun Gu, Wilbur G. Catabay, Zhihai Wang, Wei-Jen Hsia |
2007-08-21 |
| 7189628 |
Fabrication of trenches with multiple depths on the same substrate |
Mohammad R. Mirbedini, Venkatesh P. Gopinath, Verne Hornback, Dodd Defibaugh, Ynhi Le |
2007-03-13 |
| 7081406 |
Interconnect dielectric tuning |
Wai Lo, Shiqun Gu, Wilbur G. Catabay, Zhihai Wang, Wei-Jen Hsia |
2006-07-25 |
| 6864152 |
Fabrication of trenches with multiple depths on the same substrate |
Mohammad R. Mirbedini, Venkatesh P. Gopinath, Verne Hornback, Dodd Defibaugh, Ynhi Le |
2005-03-08 |
| 6818516 |
Selective high k dielectrics removal |
Wai Lo, Shiqun Gu, James R. B. Elmer |
2004-11-16 |
| 6806038 |
Plasma passivation |
Shiqun Gu, Ryan Tadashi Fujimoto |
2004-10-19 |
| 6794304 |
Method and apparatus for reducing microtrenching for borderless vias created in a dual damascene process |
Shiqun Gu, Masaichi Eda, Peter McGrath, Jim Elmer |
2004-09-21 |
| 6746925 |
High-k dielectric bird's beak optimizations using in-situ O2 plasma oxidation |
Shiqun Gu, Wai Lo, Jim Elmer |
2004-06-08 |
| 6743669 |
Method of reducing leakage using Si3N4 or SiON block dielectric films |
Shiqun Gu, Peter McGrath |
2004-06-01 |
