ME

Masaichi Eda

Lsi Logic: 6 patents #302 of 1,957Top 20%
ON onsemi: 1 patents #1,116 of 1,901Top 60%
Overall (All Time): #716,431 of 4,157,543Top 20%
7
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11049956 Method of forming a semiconductor device Dean E. Probst, Jeffery A. Neuls, Peter A. Burke, Peter McGrath, Prasad Venkatraman 2021-06-29
7094687 Reduced dry etching lag 2006-08-22
6969683 Method of preventing resist poisoning in dual damascene structures Rongxiang Hu, Yongbae Kim, Sang-Yun Lee, Hiroaki Takikawa, Shumay X. Dou +5 more 2005-11-29
6794304 Method and apparatus for reducing microtrenching for borderless vias created in a dual damascene process Shiqun Gu, Peter McGrath, Hong Lin, Jim Elmer 2004-09-21
6743725 High selectivity SiC etch in integrated circuit fabrication Rongxiang Hu, Philippe Schoenborn 2004-06-01
6713386 Method of preventing resist poisoning in dual damascene structures Rongxiang Hu, Yongbae Kim, Sang-Yun Lee, Hiroaki Takikawa, Shumay X. Dou +5 more 2004-03-30
6686272 Anti-reflective coatings for use at 248 nm and 193 nm Sang-Yun Lee, Hongqiang Lu, Wei-Jen Hsia, Wilbur G. Catabay, Hiroaki Takikawa +1 more 2004-02-03