PM

Peter McGrath

Lsi Logic: 7 patents #248 of 1,957Top 15%
NA Nantero: 2 patents #44 of 73Top 65%
ON onsemi: 2 patents #740 of 1,901Top 40%
Overall (All Time): #453,644 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11049956 Method of forming a semiconductor device Dean E. Probst, Jeffery A. Neuls, Masaichi Eda, Peter A. Burke, Prasad Venkatraman 2021-06-29
9029215 Method of making an insulated gate semiconductor device having a shield electrode structure Zia Hossain, Gordon M. Grivna, Duane B. Barber, Balaji Padmanabhan, Prasad Venkatraman 2015-05-12
7911034 Techniques for precision pattern transfer of carbon nanotubes from photo mask to wafers Shiqun Gu, James R. B. Elmer, Richard J. Carter, Thomas Rueckes 2011-03-22
7538040 Techniques for precision pattern transfer of carbon nanotubes from photo mask to wafers Shiqun Gu, James R. B. Elmer, Richard J. Carter, Thomas Rueckes 2009-05-26
7098515 Semiconductor chip with borderless contact that avoids well leakage Shioun Gu, Derryl J. Allman 2006-08-29
6972840 Method of reducing process plasma damage using optical spectroscopy Shiqun Gu, Ryan Tadashi Fujimoto 2005-12-06
6893937 Method for preventing borderless contact to well leakage Shiqun Gu, Derryl J. Allman 2005-05-17
6794304 Method and apparatus for reducing microtrenching for borderless vias created in a dual damascene process Shiqun Gu, Masaichi Eda, Hong Lin, Jim Elmer 2004-09-21
6743669 Method of reducing leakage using Si3N4 or SiON block dielectric films Hong Lin, Shiqun Gu 2004-06-01
6673200 Method of reducing process plasma damage using optical spectroscopy Shiqun Gu, Ryan Tadashi Fujimoto 2004-01-06
6551901 Method for preventing borderless contact to well leakage Shiqun Gu, Derryl J. Allman 2003-04-22