Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7153781 | Method to etch poly Si gate stacks with raised STI structure | Young Jin Park | 2006-12-26 |
| 6838339 | Area-efficient stack capacitor | — | 2005-01-04 |
| 6753252 | Contact plug formation for devices with stacked capacitors | Youngjin Park, David E. Kotecki, Greg Costrini | 2004-06-22 |
| 6573192 | Dual thickness gate oxide fabrication method using plasma surface treatment | — | 2003-06-03 |
| 6440793 | Vertical MOSFET | Ramachandra Divakaruni, Jack A. Mandelman, Carl Radens, Jai-Hoon Sim | 2002-08-27 |
| 6414347 | Vertical MOSFET | Ramachandra Divakaruni, Jack A. Mandelman, Carl Radens, Jai-Hoon Sim | 2002-07-02 |
| 6362033 | Self-aligned LDD formation with one-step implantation for transistor formation | Young Jin Park | 2002-03-26 |
| 6355520 | Method for fabricating 4F2 memory cells with improved gate conductor structure | Youngjin Park | 2002-03-12 |
| 6352934 | Sidewall oxide process for improved shallow junction formation in support region | — | 2002-03-05 |
| 6326260 | Gate prespacers for high density, high performance DRAMs | Ramachandra Divakaruni, James W. Adkisson, Mary E. Weybright, Scott D. Halle, Jeffrey P. Gambino | 2001-12-04 |
| 6294436 | Method for fabrication of enlarged stacked capacitors using isotropic etching | Youngjin Park | 2001-09-25 |
| 6284666 | Method of reducing RIE lag for deep trench silicon etching | Munir D. Naeem, Gangadhara S. Mathad, Byeong Y. Kim, Stephan Kudelka, Brian Lee +3 more | 2001-09-04 |
| 6261924 | Maskless process for self-aligned contacts | Jack A. Mandelman, Young Jin Park | 2001-07-17 |
| 5264391 | Method of forming a self-aligned contact utilizing a polysilicon layer | Gon Son, Soo-Sik Yoon, Dong-Duk Lee, Hae-Sung Park, Sea C. Kim | 1993-11-23 |