Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7030479 | Integrated circuit die and/or package having a variable pitch contact array for maximization of number of signal lines per routing layer | William M. Siu | 2006-04-18 |
| 6664620 | Integrated circuit die and/or package having a variable pitch contact array for maximization of number of signal lines per routing layer | William M. Siu | 2003-12-16 |
| 5777265 | Multilayer molded plastic package design | Debendra Mallik, Ron Vitt, David B. Kline | 1998-07-07 |
| 5773895 | Anchor provisions to prevent mold delamination in an overmolded plastic array package | Altaf Hassan | 1998-06-30 |
| 5666004 | Use of tantalum oxide capacitor on ceramic co-fired technology | Larry E. Mosley | 1997-09-09 |
| 5608261 | High performance and high capacitance package with improved thermal dissipation | Shigeo Tanahashi | 1997-03-04 |
| 5607883 | High performance and high capacitance package with improved thermal dissipation | Shigeo Tanahashi | 1997-03-04 |
| 5556807 | Advance multilayer molded plastic package using mesic technology | Debendra Mallik, Syunsuke Ban, Takatoshi Takikawa, Shosaku Yamanaka | 1996-09-17 |
| 5532983 | Circuit design for point-to-point chip for high speed testing | Anna Madrid, Scott B. Jacobson | 1996-07-02 |
| 5488257 | Multilayer molded plastic package using mesic technology | Debendra Mallik | 1996-01-30 |
| 5475565 | Power distribution lid for IC package | J. D. Wilson | 1995-12-12 |
| 5420461 | Integrated circuit having a two-dimensional lead grid array | Debendra Mallik | 1995-05-30 |
| 5369545 | De-coupling capacitor on the top of the silicon die by eutectic flip bonding | Debendra Mallik, You Y. Yu | 1994-11-29 |
| 5345363 | Method and apparatus of coupling a die to a lead frame with a tape automated bonded tape that has openings which expose portions of the tape leads | Koushik Banerjee | 1994-09-06 |
| 5307012 | Test substation for testing semi-conductor packages | Jim Cattedra | 1994-04-26 |
| 5210939 | Lead grid array integrated circuit | Debendra Mallik | 1993-05-18 |
| 5099388 | Alumina multilayer wiring substrate provided with high dielectric material layer | Masahiro Ogawa, Kozo Yamasaki, Mitsuru Hirano, Michael A. Schmitt | 1992-03-24 |
| 5060049 | Multiple resistivity wiring apparatus | Kozo Yamasaki, Kouichi Mouri, Naomiki Kato, Mitsuru Hirano, Michael A. Schmitt | 1991-10-22 |
| 4891687 | Multi-layer molded plastic IC package | Debendra Mallik | 1990-01-02 |
| 4835120 | Method of making a multilayer molded plastic IC package | Debendra Mallik | 1989-05-30 |
| 4810671 | Process for bonding die to substrate using a gold/silicon seed | Eric Tosaya | 1989-03-07 |
| 4771018 | Process of attaching a die to a substrate using gold/silicon seed | Eric Tosaya | 1988-09-13 |