Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12040014 | Configurable resistivity for lines in a memory device | Isaiah O. Gyan, Robert Cassel, Jian Jiao, William L. Cooper, Jason R. Johnson +1 more | 2024-07-16 |
| 11705197 | Modified write voltage for memory devices | Sandeepan Dasgupta, Sanjay Rangan, Nevil N. Gajera, Mase J. Taub, Kiran Pangal | 2023-07-18 |
| 11495293 | Configurable resistivity for lines in a memory device | Isaiah O. Gyan, Robert Cassel, Jian Jiao, William L. Cooper, Jason R. Johnson +1 more | 2022-11-08 |
| 11170853 | Modified write voltage for memory devices | Sandeepan Dasgupta, Sanjay Rangan, Nevil N. Gajera, Mase J. Taub, Kiran Pangal | 2021-11-09 |
| 11100984 | Non volatile cross point memory having word line pass transistor with multiple active states | Sanjay Rangan | 2021-08-24 |
| 10884640 | Set technique for phase change memory | Lu Liu, Sanjay Rangan, Enrico Varesi, Innocenzo Tortorelli, Hongmei Wang +1 more | 2021-01-05 |
| 10796761 | Tailoring current magnitude and duration during a programming pulse for a memory device | Lu Liu, Sanjay Rangan | 2020-10-06 |
| 10553286 | Tailoring timing offsets during a programming pulse for a memory device | Daniel Chu, Shravya Gottipati | 2020-02-04 |
| 10360977 | Tailoring current magnitude and duration during a programming pulse for a memory device | Lu Liu, Sanjay Rangan | 2019-07-23 |
| 10248351 | Set technique for phase change memory | Lu Liu, Sanjay Rangan, Enrico Varesi, Innocenzo Tortorelli, Hongmei Wang +1 more | 2019-04-02 |
| 7045890 | Heat spreader and stiffener having a stiffener extension | Hong Xie, Kristopher Frutschy, Ajit Sathe | 2006-05-16 |
| 6459563 | Method and apparatus for polygonal heat slug | Robert J. Chroneos, Jr. | 2002-10-01 |
| 6440770 | Integrated circuit package | Robert J. Chroneos, Jr., Tom Mozdzen | 2002-08-27 |
| 6403891 | Metallization removal under the laser mark area for substrates | Craig Randleman | 2002-06-11 |
| 6256189 | Heat slug design which facilitates mounting of discrete components on a package without losing lands or pins in the package | Robert J. Chroneos, Jr. | 2001-07-03 |
| 6214638 | Bond pad functional layout on die to improve package manufacturability and assembly | — | 2001-04-10 |
| 6043559 | Integrated circuit package which contains two in plane voltage busses and a wrap around conductive strip that connects a bond finger to one of the busses | Robert J. Chroneos, Jr., Tom Mozdzen | 2000-03-28 |
| 6031283 | Integrated circuit package | Robert J. Chroneos, Jr., Tom Mozdzen | 2000-02-29 |
| 5895977 | Bond pad functional layout on die to improve package manufacturability and assembly | — | 1999-04-20 |
| 5811880 | Design for mounting discrete components inside an integrated circuit package for frequency governing of microprocessors | Barbara Jane Ultis, Sanjay Gupta, John F. McMahon | 1998-09-22 |
| 5787575 | Method for plating a bond finger of an intergrated circuit package | Robert J. Chroneos, Jr., Tom Mozdzen | 1998-08-04 |
| 5734559 | Staggered bond finger design for fine pitch integrated circuit packages | Robert J. Chroneos, Jr. | 1998-03-31 |
| 5557502 | Structure of a thermally and electrically enhanced plastic ball grid array package | Debendra Mallik, Ashok K. Seth | 1996-09-17 |
| 5444602 | An electronic package that has a die coupled to a lead frame by a dielectric tape and a heat sink that providees both an electrical and a thermal path between the die and teh lead frame | Siva Natarajan, Debendra Mallik, Praveen Jain | 1995-08-22 |
| 5345363 | Method and apparatus of coupling a die to a lead frame with a tape automated bonded tape that has openings which expose portions of the tape leads | Bidyut K. Bhattacharyya | 1994-09-06 |