Issued Patents All Time
Showing 101–125 of 168 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10761264 | Transmission lines using bending fins from local stress | Rahul Ramaswamy, Chia-Hong Jan, Neville L. Dias, Hsu-Yu Chang, Roman W. Olac-Vaw +1 more | 2020-09-01 |
| 10763209 | MOS antifuse with void-accelerated breakdown | Roman W. Olac-Vaw, Chia-Hong Jan, Hsu-Yu Chang, Ting Chang, Rahul Ramaswamy +2 more | 2020-09-01 |
| 10756210 | Depletion mode gate in ultrathin FINFET based architecture | Chia-Hong Jan, Hsu-Yu Chang, Neville L. Dias, Rahul Ramaswamy, Roman W. Olac-Vaw +1 more | 2020-08-25 |
| 10741640 | Dielectric and isolation lower Fin material for Fin-based electronics | Chia-Hong Jan | 2020-08-11 |
| 10707346 | High-voltage transistor with self-aligned isolation | Chia-Hong Jan | 2020-07-07 |
| 10692771 | Non-planar I/O and logic semiconductor devices having different workfunction on common substrate | Roman W. Olac-Vaw, Chia-Hong Jan, Pei-Chi Liu | 2020-06-23 |
| 10692888 | High voltage three-dimensional devices having dielectric liners | Jeng-Ya David Yeh, Curtis Tsai, Joodong Park, Chia-Hong Jan, Gopinath Bhimarasetti | 2020-06-23 |
| 10658361 | Methods of integrating multiple gate dielectric transistors on a tri-gate (FINFET) process | Curtis Tsai, Chia-Hong Jan, Jeng-Ya David Yeh, Joodong Park | 2020-05-19 |
| 10643999 | Doping with solid-state diffusion sources for finFET architectures | Chia-Hong Jan, Jeng-Ya David Yeh, Hsu-Yu Chang, Neville L. Dias, Chanaka D. Munasinghe | 2020-05-05 |
| 10559688 | Transistor with thermal performance boost | Chen-Guan Lee, Joodong Park, Chia-Hong Jan, Hsu-Yu Chang | 2020-02-11 |
| 10505034 | Vertical transistor using a through silicon via gate | Xiaodong Yang, Jui-Yen Lin, Kinyip Phoa, Nidhi Nidhi, Yi-Wei Chen +2 more | 2019-12-10 |
| 10355093 | Non-planar semiconductor device having omega-fin with doped sub-fin region and method to fabricate same | Gopinath Bhimarasetti, Joodong Park, Weimin Han, Raymond E. Cotner, Chia-Hong Jan | 2019-07-16 |
| 10355081 | Dielectric and isolation lower Fin material for Fin-based electronics | Chia-Hong Jan | 2019-07-16 |
| 10340220 | Compound lateral resistor structures for integrated circuitry | Chen-Guan Lee, Vadym Kapinus, Pei-Chi Liu, Joodong Park, Chia-Hong Jan | 2019-07-02 |
| 10340273 | Doping with solid-state diffusion sources for finFET architectures | Chia-Hong Jan, Jeng-Ya David Yeh, Hsu-Yu Chang, Neville L. Dias, Chanaka D. Munasinghe | 2019-07-02 |
| 10263112 | Vertical non-planar semiconductor device for system-on-chip (SoC) applications | Chia-Hong Jan, Curtis Tsai, Jeng-Ya David Yeh, Joodong Park | 2019-04-16 |
| 10243034 | Pillar resistor structures for integrated circuitry | Chen-Guan Lee, Chia-Hong Jan | 2019-03-26 |
| 10229853 | Non-planar I/O and logic semiconductor devices having different workfunction on common substrate | Roman W. Olac-Vaw, Chia-Hong Jan, Pei-Chi Liu | 2019-03-12 |
| 10229866 | On-chip through-body-via capacitors and techniques for forming same | Yi-Wei Chen, Kinyip Phoa, Nidhi Nidhi, Jui-Yen Lin, Kun-Huan Shih +2 more | 2019-03-12 |
| 10204999 | Transistor with airgap spacer | Chen-Guan Lee, Joodong Park, En-Shao Liu, Everett S. Cassidy-Comfort, Chia-Hong Jan | 2019-02-12 |
| 10192969 | Transistor gate metal with laterally graduated work function | Chia-Hong Jan, Hsu-Yu Chang, Roman W. Olac-Vaw, Ting Chang, Rahul Ramaswamy +2 more | 2019-01-29 |
| 10164115 | Non-linear fin-based devices | Neville L. Dias, Chia-Hong Jan, Roman W. Olac-Vaw, Hsu-Yu Chang, Ting Chang +2 more | 2018-12-25 |
| 10158034 | Through silicon via based photovoltaic cell | Kinyip Phoa, Nidhi Nidhi, Chia-Hong Jan, Yi-Wei Chen | 2018-12-18 |
| 10115721 | Planar device on fin-based transistor architecture | Peter J. Vandervoorn, Chia-Hong Jan | 2018-10-30 |
| 10103542 | Extended drain non-planar MOSFETs for electrostatic discharge (ESD) protection | Akm A. Ahsan | 2018-10-16 |