Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12120878 | Block-to-block isolation and deep contact using pillars in a memory array | Deepak Thimmegowda, Brian Cleereman, Srivardhan Gowda, Liu Liu, Krishna K. Parat +2 more | 2024-10-15 |
| 11830818 | Semiconductor device having metal interconnects with different thicknesses | Kinyip Phoa, Nidhi Nidhi, Chia-Hong Jan | 2023-11-28 |
| 11808834 | Phased-array doppler radar using an injection-locking technique | Tzyy-Sheng Horng, Chao-Kai Wen, Yi-Chen Lai, Yu-Chi Huang, De-Ming Chian | 2023-11-07 |
| 11737362 | Harvesting energy in an integrated circuit using the seebeck effect | Kinyip Phoa, Nidhi Nidhi, Chia-Hong Jan | 2023-08-22 |
| 11642033 | Vital-sign radar sensor using wireless internet signals | Tzyy-Sheng Horng, Yi-Chen Lai | 2023-05-09 |
| 11264329 | Semiconductor device having metal interconnects with different thicknesses | Kinyip Phoa, Nidhi Nidhi, Chia-Hong Jan | 2022-03-01 |
| 11063137 | Asymmetric spacer for low capacitance applications | Chen-Guan Lee, Joodong Park, Walid M. Hafez, Kun-Huan Shih | 2021-07-13 |
| 10923574 | Transistor with inner-gate spacer | En-Shao Liu, Joodong Park, Chen-Guan Lee, Chia-Hong Jan | 2021-02-16 |
| 10903372 | Metal-oxide-polysilicon tunable resistor for flexible circuit design and method of fabricating same | Kinyip Phoa, Nidhi Nidhi, Chia-Hong Jan | 2021-01-26 |
| 10505034 | Vertical transistor using a through silicon via gate | Xiaodong Yang, Kinyip Phoa, Nidhi Nidhi, Yi-Wei Chen, Kun-Huan Shih +2 more | 2019-12-10 |
| 10431661 | Transistor with inner-gate spacer | En-Shao Liu, Joodong Park, Chen-Guan Lee, Chia-Hong Jan | 2019-10-01 |
| 10229866 | On-chip through-body-via capacitors and techniques for forming same | Yi-Wei Chen, Kinyip Phoa, Nidhi Nidhi, Kun-Huan Shih, Xiaodong Yang +2 more | 2019-03-12 |