Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Ting Chang — 20 Patents

Intel: 19 patents #2,167 of 30,777Top 8%
ALAcer Laboratories: 1 patents #3 of 31Top 10%
Portland, OR: #938 of 9,213 inventorsTop 15%
Oregon: #2,168 of 28,073 inventorsTop 8%
Overall (All Time): #214,803 of 4,157,543Top 6%
20 Patents All Time
Ting Chang has been granted 20 US patents while listed as an inventor at Intel. The first was granted in 2004 and the most recent in October 2025. Ting Chang ranks #214,803 of 4,157,543 US inventors in our database (top 5.2%). Patent records list Ting Chang in Portland, OR, US.

Issued Patents All Time

Showing 1–20 of 20 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12453145 Single gated 3D nanowire inverter for high density thick gate SoC applications Ramachandran Ramaswamy, Walid M. Hafez, Tanuj Trivedi, Jeenok T. Kim, Babak Fallahazad +2 more 2025-10-21
12369358 Co-integrated high performance nanoribbon transistors with high voltage thick gate finFET devices Tanuj Trivedi, Rahul Ramaswamy, Jeong Dong Kim, Walid M. Hafez, Babak Fallahazad +2 more 2025-07-22
12349411 Gate-all-around integrated circuit structures having dual nanoribbon channel structures Tanuj Trivedi, Rahul Ramaswamy, Jeong Dong Kim, Babak Fallahazad, Hsu-Yu Chang +2 more 2025-07-01
12249622 Nanoribbon thick gate devices with differential ribbon spacing and width for SOC applications Tanuj Trivedi, Rahul Ramaswamy, Jeong Dong Kim, Walid M. Hafez, Babak Fallahazad +2 more 2025-03-11
12089411 Self-aligned front-end charge trap flash memory cell and capacitor design for integrated high-density scaled devices Tanuj Trivedi, Walid M. Hafez, Rohan K. Bambery, Daniel B. O'Brien, Christopher Alan Nolph +1 more 2024-09-10 $16,964,000
12040395 High voltage extended-drain MOS (EDMOS) nanowire transistors Nidhi Nidhi, Rahul Ramaswamy, Walid M. Hafez, Hsu-Yu Chang, Babak Fallahazad +2 more 2024-07-16 $26,089,000
11996403 ESD diode solution for nanoribbon architectures Nidhi Nidhi, Rahul Ramaswamy, Walid M. Hafez, Hsu-Yu Chang, Babak Fallahazad +4 more 2024-05-28 $30,739,000
11862703 Gate-all-around integrated circuit structures having dual nanoribbon channel structures Tanuj Trivedi, Rahul Ramaswamy, Jeong Dong Kim, Babak Fallahazad, Hsu-Yu Chang +2 more 2024-01-02 $30,016,000
11791380 Single gated 3D nanowire inverter for high density thick gate SOC applications Rahul Ramaswamy, Walid M. Hafez, Tanuj Trivedi, Jeong Dong Kim, Babak Fallahazad +2 more 2023-10-17 $15,641,000
11581404 Gate-all-around integrated circuit structures having depopulated channel structures Tanuj Trivedi, Jeong Dong Kim, Walid M. Hafez, Hsu-Yu Chang, Rahul Ramaswamy +1 more 2023-02-14 $12,790,000
11437483 Gate-all-around integrated circuit structures having dual nanoribbon channel structures Tanuj Trivedi, Rahul Ramaswamy, Jeong Dong Kim, Babak Fallahazad, Hsu-Yu Chang +2 more 2022-09-06 $12,766,000
11094782 Gate-all-around integrated circuit structures having depopulated channel structures Tanuj Trivedi, Jeong Dong Kim, Walid M. Hafez, Hsu-Yu Chang, Rahul Ramaswamy +1 more 2021-08-17 $29,127,000
10847456 Antifuse element using spacer breakdown Chia-Hong Jan, Walid M. Hafez 2020-11-24 $25,522,000
10763209 MOS antifuse with void-accelerated breakdown Roman W. Olac-Vaw, Walid M. Hafez, Chia-Hong Jan, Hsu-Yu Chang, Rahul Ramaswamy +2 more 2020-09-01 $24,773,000
10312367 Monolithic integration of high voltage transistors and low voltage non-planar transistors Kinyip Phoa, Nidhi Nidhi, Chia-Hong Jan 2019-06-04 $21,702,000
10192969 Transistor gate metal with laterally graduated work function Chia-Hong Jan, Walid M. Hafez, Hsu-Yu Chang, Roman W. Olac-Vaw, Rahul Ramaswamy +2 more 2019-01-29 $23,219,000
10164115 Non-linear fin-based devices Neville L. Dias, Chia-Hong Jan, Walid M. Hafez, Roman W. Olac-Vaw, Hsu-Yu Chang +2 more 2018-12-25
9929090 Antifuse element using spacer breakdown Chia-Hong Jan, Walid M. Hafez 2018-03-27 $21,620,000
9799668 Memory cell having isolated charge sites and method of fabricating same Chia-Hong Jan, Walid M. Hafez 2017-10-24 $10,797,000
6810500 Method for mapping a two-dimensional data array in a memory 2004-10-26