Issued Patents All Time
Showing 176–200 of 245 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6801465 | Apparatus and method for a memory storage cell leakage cancellation scheme | Dinesh Somasekhar, Yibin Ye, Fatih Hamzaoglu | 2004-10-05 |
| 6801463 | Method and apparatus for leakage compensation with full Vcc pre-charge | Muhammad M. Khellah, Yibin Ye, Dinesh Somasekhar | 2004-10-05 |
| 6794630 | Method and apparatus for adjusting the threshold of a CMOS radiation-measuring circuit | Ali Keshavarzi, Jaume A. Segura | 2004-09-21 |
| 6784722 | Wide-range local bias generator for body bias grid | Stephen H. Tang, Dinesh Somasekhar, James W. Tschanz | 2004-08-31 |
| 6784688 | Skewed repeater bus | Muhammad M. Khellah, James W. Tschanz, Yibin Ye | 2004-08-31 |
| 6763484 | Body bias using scan chains | James W. Tschanz, Siva G. Narendra | 2004-07-13 |
| 6744301 | System using body-biased sleep transistors to reduce leakage power while minimizing performance penalties and noise | James W. Tschanz, Yibin Ye, Siva G. Narendra | 2004-06-01 |
| 6734498 | Insulated channel field effect transistor with an electric field terminal region | Ali Keshavarzi, Siva G. Narendra | 2004-05-11 |
| 6724649 | Memory cell leakage reduction | Yibin Ye, Dinesh Somasekhar | 2004-04-20 |
| 6724648 | SRAM array with dynamic voltage for reducing active leakage power | Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye | 2004-04-20 |
| 6721222 | Noise suppression for open bit line DRAM architectures | Dinesh Somasekhar, Shih-Lien Linus Lu | 2004-04-13 |
| 6710642 | Bias generation circuit | Stephen H. Tang, Siva G. Narendra | 2004-03-23 |
| 6710627 | Dynamic CMOS circuits with individually adjustable noise immunity | Mircea R. Stan | 2004-03-23 |
| 6707708 | Static random access memory with symmetric leakage-compensated bit line | Atila Alvandpour, Dinesh Somasekhar, Steven Hsu, Ram Krishnamurthy | 2004-03-16 |
| 6693332 | Current reference apparatus | Siva G. Narendra, Stephen H. Tang, Zachary Keer | 2004-02-17 |
| 6683467 | Method and apparatus for providing rotational burn-in stress testing | Ali Keshavarzi, David M. Wu, Yibin Ye | 2004-01-27 |
| 6653866 | Domino logic with output predischarge | Siva G. Narendra, Yibin Ye | 2003-11-25 |
| 6642765 | Transmission-gate based flip-flop | Dejan Markovic, James W. Tschanz | 2003-11-04 |
| 6643199 | Memory with reduced sub-threshold leakage current in dynamic bit lines of read ports | Stephen H. Tang, Steven Hsu, Shih-Lien Linus Lu | 2003-11-04 |
| 6632686 | Silicon on insulator device design having improved floating body effect | Ali Keshavarzi, Siva G. Narendra, James W. Tschanz | 2003-10-14 |
| 6608786 | Apparatus and method for a memory storage cell leakage cancellation scheme | Dinesh Somasekhar, Yibin Ye, Fatih Hamzaoglu | 2003-08-19 |
| 6608513 | Flip-flop circuit having dual-edge triggered pulse generator | James W. Tschanz, Siva G. Narendra | 2003-08-19 |
| 6593799 | Circuit including forward body bias from supply voltage and ground nodes | Ali Keshavarzi, Siva G. Narendra, Shekhar Y. Borkar | 2003-07-15 |
| 6566914 | Sense amplifier having reduced Vt mismatch in input matched differential pair | David Bruneau, Siva G. Narendra | 2003-05-20 |
| 6567329 | Multiple word-line accessing and accessor | Dinesh Somasekhar, Shih-Lien Linus Lu | 2003-05-20 |