Issued Patents All Time
Showing 26–50 of 89 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10929323 | Multi-core communication acceleration using hardware queue device | Ren Wang, Yipeng Wang, Andrew J. Herdrich, Jr-Shian Tsai, Tsung-Yuan C. Tai +20 more | 2021-02-23 |
| 10885202 | Method and apparatus to provide secure application execution | Francis X. McKeen, Carlos V. Rozas, Uday Savagaonkar, Simon P. Johnson, Vincent R. Scarlata +16 more | 2021-01-05 |
| 10884195 | Techniques to support multiple interconnect protocols for a common set of interconnect connectors | Mahesh Wagh, Mark S. Myers, Dimitrios Ziakas, Bassam N. Coury | 2021-01-05 |
| 10705961 | Scalably mechanism to implement an instruction that monitors for writes to an address | Yen-Cheng Liu, Bahaa Fahim, Erik G. Hallnor, Jeffrey D. Chamberlain, Antonio Juan | 2020-07-07 |
| 10579551 | Memory pressure notifier | Ishwar Agarwal, Omid Azizi, Chandan Egbert, Amin Firoozshahian, David Hansen +5 more | 2020-03-03 |
| 10572260 | Spatial and temporal merging of remote atomic operations | Christopher J. Hughes, Joseph Nuzman, Jonas Svennebring, Doddaballapur N. Jayasimha, Samantika S. Sury +4 more | 2020-02-25 |
| 10445271 | Multi-core communication acceleration using hardware queue device | Ren Wang, Namakkal N. Venkatesan, Debra Bernstein, Edwin Verplanke, An Yan +20 more | 2019-10-15 |
| 10437616 | Method, apparatus, system for optimized work submission to an accelerator work queue | Ishwar Agarwal, Rajesh M. Sankaran | 2019-10-08 |
| 10296459 | Remote atomic operations in multi-socket systems | Doddaballapur N. Jayasimha, Samantika S. Sury, Christopher J. Hughes, Jonas Svennebring, Yen-Cheng Liu +1 more | 2019-05-21 |
| 10216668 | Technologies for a distributed hardware queue manager | Ren Wang, Yipeng Wang, Jr-Shian Tsai, Andrew J. Herdrich, Tsung-Yuan C. Tai +17 more | 2019-02-26 |
| 10102380 | Method and apparatus to provide secure application execution | Francis X. McKeen, Carlos V. Rozas, Uday Savagaonkar, Simon P. Johnson, Vincent R. Scarlata +16 more | 2018-10-16 |
| 9418009 | Inclusive and non-inclusive tracking of local cache lines to avoid near memory reads on cache line memory writes into a two level system memory | Adrian C. Moga, Vedaraman Geetha, Bahaa Fahim, Robert G. Blankenship, Yen-Cheng Liu +1 more | 2016-08-16 |
| 9087200 | Method and apparatus to provide secure application execution | Francis X. McKeen, Carlos V. Rozas, Uday Savagaonkar, Simon P. Johnson, Vincent R. Scarlata +16 more | 2015-07-21 |
| 8468308 | System and method for non-migratory requests in a cache coherency protocol | Simon C. Steely, Jr., Gregory Edward Tierney | 2013-06-18 |
| 8176259 | System and method for resolving transactions in a cache coherency protocol | Gregory Edward Tierney, Simon C. Steely, Jr. | 2012-05-08 |
| 8145847 | Cache coherency protocol with ordering points | Gregory Edward Tierney, Simon C. Steely, Jr. | 2012-03-27 |
| 8090914 | System and method for creating ordering points | Gregory Edward Tierney, Simon C. Steely, Jr. | 2012-01-03 |
| 7856534 | Transaction references for requests in a multi-processor network | Simon C. Steely, Jr., Gregory Edward Tierney | 2010-12-21 |
| 7818391 | System and method to facilitate ordering point migration | Gregory Edward Tierney, Simon C. Steely, Jr. | 2010-10-19 |
| 7769959 | System and method to facilitate ordering point migration to memory | Gregory Edward Tierney, Simon C. Steely, Jr. | 2010-08-03 |
| 7620696 | System and method for conflict responses in a cache coherency protocol | Gregory Edward Tierney, Simon C. Steely, Jr. | 2009-11-17 |
| 7395374 | System and method for conflict responses in a cache coherency protocol with ordering point migration | Gregory Edward Tierney, Simon C. Steely, Jr. | 2008-07-01 |
| 7380107 | Multi-processor system utilizing concurrent speculative source request and system source request in response to cache miss | Simon C. Steely, Jr., Gregory Edward Tierney | 2008-05-27 |
| 7376794 | Coherent signal in a multi-processor system | Simon C. Steely, Jr., Gregory Edward Tierney | 2008-05-20 |
| 7203775 | System and method for avoiding deadlock | Gregory Edward Tierney | 2007-04-10 |