Issued Patents All Time
Showing 76–89 of 89 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6105108 | Method and apparatus for releasing victim data buffers of computer systems by comparing a probe counter with a service counter | Simon C. Steely, Jr. | 2000-08-15 |
| 6088771 | Mechanism for reducing latency of memory barrier operations on a multiprocessor system | Simon C. Steely, Jr., Madhumitra Sharma, Kourosh Gharachorloo | 2000-07-11 |
| 6085263 | Method and apparatus for employing commit-signals and prefetching to maintain inter-reference ordering in a high-performance I/O processor | Madhumitra Sharma, Chester Pawlowski, Kourosh Gharachorloo, Simon C. Steely, Jr. | 2000-07-04 |
| 6085294 | Distributed data dependency stall mechanism | Rahul Razdan | 2000-07-04 |
| 6076129 | Distributed data bus sequencing for a system bus with separate address and data bus protocols | David Fenwick, Denis Foley, David W. Hartwell, Elbert Bloom, Ricky C. Hetherington | 2000-06-13 |
| 6061765 | Independent victim data buffer and probe buffer release control utilzing control flag | Simon C. Steely, Jr., Robert Eugene Stewart, James B. Keller | 2000-05-09 |
| 6055605 | Technique for reducing latency of inter-reference ordering using commit signals in a multiprocessor system having shared caches | Madhumitra Sharma, Simon C. Steely, Jr., Kourosh Gharachorloo | 2000-04-25 |
| 5848258 | Memory bank addressing scheme | David Fenwick, Denis Foley, Dave Hartwell | 1998-12-08 |
| 5761731 | Method and apparatus for performing atomic transactions in a shared memory multi processor system | Denis Foley, David Fenwick | 1998-06-02 |
| 5758106 | Arbitration unit which requests control of the system bus prior to determining whether such control is required | David Fenwick, Denis Foley | 1998-05-26 |
| 5737546 | System bus with separate address and data bus protocols | David Fenwick, Denis Foley, Dale R. Keck | 1998-04-07 |
| 5666551 | Distributed data bus sequencing for a system bus with separate address and data bus protocols | David Fenwick, Denis Foley, David W. Hartwell, Elbert Bloom, Ricky C. Hetherington | 1997-09-09 |
| 5566325 | Method and apparatus for adaptive memory access | E. William Bruce, II, Dave Hartwell, David Fenwick, Denis Foley | 1996-10-15 |
| 5537575 | System for handling cache memory victim data which transfers data from cache to the interface while CPU performs a cache lookup using cache status information | Denis Foley, Douglas J. Burns | 1996-07-16 |