Issued Patents All Time
Showing 26–50 of 170 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7119574 | Passage structures for use in low-voltage applications | Andy L. Lee, Wanli Chang, Cameron McClintock, John E. Turner, Brian Johnson +2 more | 2006-10-10 |
| 7109748 | Integrated circuits with reduced standby power consumption | Yow-Juang Liu, Hugh Sungki O | 2006-09-19 |
| 7058920 | Methods for designing PLD architectures for flexible placement of IP function blocks | Andy L. Lee, Cameron McClintock, Brian Johnson, Srinivas T. Reddy, Chris Lane +3 more | 2006-06-06 |
| 7034570 | I/O cell configuration for multiple I/O standards | Cameron McClintock, Bonnie I. Wang | 2006-04-25 |
| 6977520 | Time-multiplexed routing in a programmable logic device architecture | Michael D. Hutton | 2005-12-20 |
| 6970014 | Routing architecture for a programmable logic device | David Lewis, Paul Leventis, Andy L. Lee, Brian Johnson, Srinivas T. Reddy +5 more | 2005-11-29 |
| 6940307 | Integrated circuits with reduced standby power consumption | Yow-Juang Liu, Hugh Sungki O | 2005-09-06 |
| 6897679 | Programmable logic array integrated circuits | L. Todd Cope, Cameron R. Mc Clintock, William Leong, James A. Watson, Joseph Huang +1 more | 2005-05-24 |
| 6895570 | System and method for optimizing routing lines in a programmable logic device | David Lewis, Vaughn Betz, Paul Leventis, Michael Chan, Cameron McClintock +3 more | 2005-05-17 |
| 6882177 | Tristate structures for programmable logic devices | Srinivas T. Reddy | 2005-04-19 |
| 6879183 | Programmable logic device architectures with super-regions having logic regions and a memory region | David Jefferson, Cameron McClintock, James Schleicher, Andy L. Lee, Manuel Mejia +3 more | 2005-04-12 |
| 6857043 | Shift register implementations of first-in/first-out memories utilizing a double increment gray code counter | Andy L. Lee, Brian Johnson | 2005-02-15 |
| 6842040 | Differential interconnection circuits in programmable logic devices | Wanli Chang, Andy L. Lee, Cameron McClintock, Richard Yen-Hsiang Chang | 2005-01-11 |
| 6836151 | I/O cell configuration for multiple I/O standards | Cameron McClintock, Bonnie I. Wang | 2004-12-28 |
| 6815981 | Programmable logic array integrated circuit devices | Srinivas T. Reddy, David Jefferson, Rina Raman, L. Todd Cope, Christopher F. Lane +7 more | 2004-11-09 |
| RE38651 | Variable depth and width memory device | Chiakang Sung, Wanli Chang, Joseph Huang, L. Todd Cope, Cameron McClintock +3 more | 2004-11-09 |
| 6798242 | Programmable logic device with hierarchical interconnection resources | Srinivas T. Reddy, Christopher F. Lane, Ketan Zaveri, Manuel Mejia, David Jefferson +2 more | 2004-09-28 |
| 6759870 | Programmable logic array integrated circuits | Bahram Ahanin, Craig Lytle, Francis B. Heile, Bruce B. Pedersen, Kerry Veenstra | 2004-07-06 |
| 6720796 | Multiple size memories in a programmable logic device | Srinivas T. Reddy, David Jefferson, Christopher F. Lane, Vikram Santurkar | 2004-04-13 |
| 6714050 | I/O cell configuration for multiple I/O standards | Cameron McClintock, Bonnie I. Wang | 2004-03-30 |
| 6681378 | Programming mode selection with JTAG circuits | Xiaobao Wang, Chiakang Sung, Joseph Huang, Bonnie I. Wang, Khai Nguyen | 2004-01-20 |
| 6661253 | Passgate structures for use in low-voltage applications | Andy L. Lee, Wanli Chang, Cameron McClintock, John E. Turner, Brian Johnson +2 more | 2003-12-09 |
| 6657456 | Programmable logic with on-chip DLL or PLL to distribute clock | David Jefferson, L. Todd Cope, Srinivas T. Reddy | 2003-12-02 |
| 6646467 | PCI-compatible programmable logic devices | Francis B. Heile, Joseph Huang, David W. Mendel, Bruce B. Pendersen, Chiakang Sung +2 more | 2003-11-11 |
| 6630842 | Routing architecture for a programmable logic device | David Lewis, Paul Leventis, Andy L. Lee, Brian Johnson, Srinivas T. Reddy +5 more | 2003-10-07 |