HA

Haitham Akkary

IN Intel: 47 patents #694 of 30,777Top 3%
AC Acceptto: 12 patents #1 of 11Top 10%
SE Secureauth: 8 patents #5 of 29Top 20%
📍 Portland, OR: #198 of 9,213 inventorsTop 3%
🗺 Oregon: #380 of 28,073 inventorsTop 2%
Overall (All Time): #27,047 of 4,157,543Top 1%
73
Patents All Time

Issued Patents All Time

Showing 51–73 of 73 patents

Patent #TitleCo-InventorsDate
5956753 Method and apparatus for handling speculative memory access operations Andrew F. Glew 1999-09-21
5881262 Method and apparatus for blocking execution of and storing load operations during their execution Jeffery M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland 1999-03-09
5860154 Method and apparatus for calculating effective memory addresses Jeffrey M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland +1 more 1999-01-12
5826109 Method and apparatus for performing multiple load operations to the same memory location in a computer system Jeffery M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland +2 more 1998-10-20
5751983 Out-of-order processor with a memory subsystem which handles speculatively dispatched load operations Jeffrey M. Abramson, David B. Papworth, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld +1 more 1998-05-12
5748937 Computer system that maintains processor ordering consistency by snooping an external bus for conflicts during out of order execution of memory access instructions Jeffrey M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland 1998-05-05
5724536 Method and apparatus for blocking execution of and storing load operations during their execution Jeffery M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland 1998-03-03
5717882 Method and apparatus for dispatching and executing a load operation to memory Jeffrey M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland +2 more 1998-02-10
5708843 Method and apparatus for handling code segment violations in a computer system Jeffrey M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Rohit A. Vidwans 1998-01-13
5694574 Method and apparatus for performing load operations in a computer system Jeffery M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland 1997-12-02
5680565 Method and apparatus for performing page table walks in a microprocessor capable of processing speculative instructions Andy Glew, Glenn J. Hinton 1997-10-21
5680572 Cache memory system having data and tag arrays and multi-purpose buffer assembly with multiple line buffers Jeffrey M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland +2 more 1997-10-21
5671444 Methods and apparatus for caching data in a non-blocking manner using a plurality of fill buffers Jeffrey M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland +2 more 1997-09-23
5664137 Method and apparatus for executing and dispatching store operations in a computer system Jeffrey M. Abramson, Atig A. Bajwa, Michael A. Fetterman, Andrew F. Glew, Glenn J. Hinton +4 more 1997-09-02
5636374 Method and apparatus for performing operations based upon the addresses of microinstructions Scott Dion Rodgers, Keshavan Tiruvallur, Michael W. Rhodehamel, Kris G. Konigsfeld, Andrew F. Glew +2 more 1997-06-03
5613083 Translation lookaside buffer that is non-blocking in response to a miss for use within a microprocessor capable of processing speculative instructions Andrew F. Glew, Glenn J. Hinton 1997-03-18
5606670 Method and apparatus for signalling a store buffer to output buffered store data for a load operation on an out-of-order execution computer system Jeffrey M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland +1 more 1997-02-25
5588126 Methods and apparatus for fordwarding buffered store data on an out-of-order execution computer system Jeffrey M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland +1 more 1996-12-24
5577200 Method and apparatus for loading and storing misaligned data on an out-of-order execution computer system Jeffrey M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland 1996-11-19
5564111 Method and apparatus for implementing a non-blocking translation lookaside buffer Andrew F. Glew, Robert P. Colwell, Glenn J. Hinton, David B. Papworth, Michael A. Fetterman 1996-10-08
5526510 Method and apparatus for implementing a single clock cycle line replacement in a data cache unit Mandar Joshi, Rob MURRAY, Brent E. Lince, Paul D. Madland, Andrew F. Glew +1 more 1996-06-11
5434987 Method and apparatus for preventing incorrect fetching of an instruction of a self-modifying code sequence with dependency on a bufered store Jeffrey M. Abramson, Andrew F. Glew, Glenn J. Hinton, Kris G. Konigsfeld, Paul D. Madland 1995-07-18
5420991 Apparatus and method for maintaining processing consistency in a computer system having multiple processors Kris G. Konigsfeld, Jeffrey M. Abramson, Glenn J. Hinton, Andrew F. Glew 1995-05-30