Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9960079 | Passive within via | Todd Myers, Nicholas R. Watts, Jui Min Lim | 2018-05-01 |
| 8487446 | Method of embedding passive component within via | Todd Myers, Nicolas R. Watts, Jui Min Lim | 2013-07-16 |
| 8188594 | Input/output package architectures | Sanka Ganesan, Kemal Aygun, Chandrashekhar Ramaswamy, Henning Braunisch | 2012-05-29 |
| 8093704 | Package on package using a bump-less build up layer (BBUL) package | John S. Guzek | 2012-01-10 |
| 7952202 | Method of embedding passive component within via | Todd Myers, Nicholas R. Watts, Jui Min Lim | 2011-05-31 |
| 7737025 | Via including multiple electrical paths | Todd Myers, Nicholas R. Watts, Renee M Defeo, Jui Min Lim | 2010-06-15 |
| 7705447 | Input/output package architectures, and methods of using same | Sanka Ganesan, Kemal Aygun, Chandrashekhar Ramaswamy, Henning Braunisch | 2010-04-27 |
| 7275316 | Method of embedding passive component within via | Todd Myers, Nicholas R. Watts, Jui Min Lim | 2007-10-02 |
| 7183653 | Via including multiple electrical paths | Todd Myers, Nicholas R. Watts, Renee M Defeo, Jui Min Lim | 2007-02-27 |