Issued Patents All Time
Showing 101–125 of 208 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7111110 | Versatile RAM for programmable logic device | — | 2006-09-19 |
| 7100141 | Technology mapping technique for fracturable logic elements | Boris Ratchev, Yean-Yow Hwang | 2006-08-29 |
| 7061268 | Initializing a carry chain in a programmable logic device | Andy L. Lee, Ninh D. Ngo, Vaughn Betz, David Lewis, James Schleicher | 2006-06-13 |
| 7042247 | Programmable look-up tables with reduced leakage current | — | 2006-05-09 |
| 7030650 | Fracturable incomplete look up table area efficient logic elements | Sinan Kaptanoglu, David Lewis | 2006-04-18 |
| 6995590 | Hybrid phase/delay locked loop circuits and methods | — | 2006-02-07 |
| 6989689 | Interconnection and input/output resources for programmable logic integrated circuit devices | Tony Ngai, Sergey Shumarayev, James Schleicher, Wei-Jen Huang, Michael D. Hutton +6 more | 2006-01-24 |
| 6975154 | Reduced power consumption clock network | — | 2005-12-13 |
| 6943580 | Fracturable lookup table and logic element | David Lewis, Sinan Kaptanoglu, Andy L. Lee | 2005-09-13 |
| 6937064 | Versatile logic element and logic array block | David Lewis, Paul Leventis, Andy L. Lee, Henry Kim, Chris Wysocki +4 more | 2005-08-30 |
| 6897678 | Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits | Ketan Zaveri, Christopher F. Lane, Srinivas T. Reddy, Andy L. Lee, Cameron McClintock | 2005-05-24 |
| 6897680 | Interconnection resources for programmable logic integrated circuit devices | James Schleicher, James Park, Sergey Shumarayev, Tony Ngai, Wei-Jen Huang +2 more | 2005-05-24 |
| 6894533 | Interconnection and input/output resources for programmable logic integrated circuit devices | Tony Ngai, Sergey Shumarayev, James Schleicher, Wei-Jen Huang, Michael D. Hutton +6 more | 2005-05-17 |
| 6888373 | Fracturable incomplete look up table for area efficient logic elements | Sinan Kaptanoglu, David Lewis | 2005-05-03 |
| 6879183 | Programmable logic device architectures with super-regions having logic regions and a memory region | David Jefferson, Cameron McClintock, James Schleicher, Andy L. Lee, Manuel Mejia +3 more | 2005-04-12 |
| 6873181 | Automated implementation of non-arithmetic operators in an arithmetic logic cell | — | 2005-03-29 |
| 6815981 | Programmable logic array integrated circuit devices | Richard G. Cliff, Srinivas T. Reddy, David Jefferson, Rina Raman, L. Todd Cope +7 more | 2004-11-09 |
| 6798240 | Logic circuitry with shared lookup table | — | 2004-09-28 |
| 6798242 | Programmable logic device with hierarchical interconnection resources | Srinivas T. Reddy, Richard G. Cliff, Christopher F. Lane, Ketan Zaveri, Manuel Mejia +2 more | 2004-09-28 |
| 6759870 | Programmable logic array integrated circuits | Richard G. Cliff, Bahram Ahanin, Craig Lytle, Francis B. Heile, Kerry Veenstra | 2004-07-06 |
| 6727727 | Interconnection resources for programmable logic integrated circuit devices | James Schleicher, James Park, Sergey Shumarayev, Tony Ngai, Wei-Jen Huang +2 more | 2004-04-27 |
| 6707315 | Registered logic macrocell with product term allocation and adjacent product term stealing | — | 2004-03-16 |
| 6670825 | Efficient arrangement of interconnection resources on programmable logic devices | Christopher F. Lane, Giles V. Powell, Wayne Yeung, Chiakang Sung | 2003-12-30 |
| 6614261 | Interconnection and input/output resources for programable logic integrated circuit devices | Tony Ngai, Sergey Shumarayev, James Schleicher, Wei-Jen Huang, Victor Maruri +1 more | 2003-09-02 |
| 6577160 | Programmable logic device with hierarchical interconnection resources | Srinivas T. Reddy, Richard G. Cliff, Christopher F. Lane, Ketan Zaveri, Manuel Mejia +2 more | 2003-06-10 |