Issued Patents All Time
Showing 51–63 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9990246 | Memory system | Murugasamy K. Nachimuthu, Jun Zhu, Tuan M. Quach | 2018-06-05 |
| 9904591 | Device, system and method to restrict access to data error information | John B. Halbert, Kuljit S. Bains, Debaleena Das | 2018-02-27 |
| 9852021 | Method and apparatus for encoding registers in a memory module | John V. Lovelace, Murugasamy M. Nachimuthu, Tuan M. Quach | 2017-12-26 |
| 9811420 | Extracting selective information from on-die dynamic random access memory (DRAM) error correction code (ECC) | Debaleena Das, Kuljit S. Bains, John B. Halbert | 2017-11-07 |
| 9772799 | Memory interface signal reduction | — | 2017-09-26 |
| 9740646 | Early identification in transactional buffered memory | Brian S. Morris, Robert G. Blankenship, Jeffrey C. Swanson | 2017-08-22 |
| 9658963 | Speculative reads in buffered memory | Brian S. Morris, Robert G. Blankenship, Yen-Cheng Liu | 2017-05-23 |
| 9632862 | Error handling in transactional buffered memory | Brian S. Morris, Robert G. Blankenship, Eric L. Hendrickson | 2017-04-25 |
| 9619408 | Memory channel that supports near memory and far memory access | Raj K. Ramanujan, Muthukumar P. Swaminathan, Tessil Thomas, Taarinya Polepeddi | 2017-04-11 |
| 9342453 | Memory channel that supports near memory and far memory access | Raj K. Ramanujan, Muthukumar P. Swaminathan, Tessil Thomas, Taarinya Polepeddi | 2016-05-17 |
| 9251874 | Memory interface signal reduction | — | 2016-02-02 |
| 7454586 | Memory device commands | Jun Shi, Sandeep Jain, Animesh Mishra, Kuljit S. Bains, David Wyatt +1 more | 2008-11-18 |
| 7188208 | Side-by-side inverted memory address and command buses | Howard S. David | 2007-03-06 |