Issued Patents All Time
Showing 326–350 of 534 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8361851 | Method for manufacturing an NMOS with improved carrier mobility | Haizhou Yin, Zhijiong Luo | 2013-01-29 |
| 8354343 | Semiconductor structure and manufacturing method of the same | Haizhou Yin, Zhijiong Luo | 2013-01-15 |
| 8354753 | 3D integrated circuit structure and method for detecting chip mis-alignement | — | 2013-01-15 |
| 8343818 | Method for forming retrograded well for MOSFET | Zhijiong Luo, Qingqing Liang, Haizhou Yin | 2013-01-01 |
| 8329566 | Method of manufacturing a high-performance semiconductor device | Wenwu Wang | 2012-12-11 |
| 8299584 | Alignment of wafers for 3D integration | Dmitriy Shneyder, Srinivasan Rangarajan, Michael J. Shapiro, Anthony K. Stamper | 2012-10-30 |
| 8298934 | Structure and method of creating entirely self-aligned metallic contacts | Jeffery B. Maxson, Cung D. Tran | 2012-10-30 |
| 8299453 | CMOS transistors with silicon germanium channel and dual embedded stressors | — | 2012-10-30 |
| 8299509 | Asymmetric source/drain junctions for low power silicon on insulator devices | Seong-Dong Kim, Zhijong Luo | 2012-10-30 |
| 8299540 | High performance MOSFET | Jing Wang | 2012-10-30 |
| 8299542 | MOSFET with multiple fully silicided gate and method for making the same | Zhijiong Luo | 2012-10-30 |
| 8299583 | Two-sided semiconductor structure | — | 2012-10-30 |
| 8294027 | Efficiency in antireflective coating layers for solar cells | Harold J. Hovel, Rainer Krause, Zhengwen Li | 2012-10-23 |
| 8283716 | High performance flash memory devices | Derek Chen | 2012-10-09 |
| 8269307 | Shallow trench isolation structure and method for forming the same | Huicai Zhong, Haizhou Yin, Qingqing Liang | 2012-09-18 |
| 8247278 | Method for manufacturing semiconductor device | Chunlong Li, Jun Luo | 2012-08-21 |
| 8232178 | Method for forming a semiconductor device with stressed trench isolation | Haizhou Yin, Zhijiong Luo | 2012-07-31 |
| 8232155 | Structure and method for manufacturing device with a V-shape channel nMOSFET | Zhijiong Luo | 2012-07-31 |
| 8227316 | Method for manufacturing double gate finFET with asymmetric halo | Oleg Gluschenkov, Jing Wang | 2012-07-24 |
| 8207027 | Triple gate and double gate finFETs with different vertical dimension fins | Yue Tan | 2012-06-26 |
| 8198153 | Process integration for flash storage element and dual conductor complementary MOSFETs | — | 2012-06-12 |
| 8188528 | Structure and method to form EDRAM on SOI substrate | Chengwen Pei, Kangguo Cheng, Herbert L. Ho, Subramanian S. Iyer, Byeong Y. Kim +1 more | 2012-05-29 |
| 8169026 | Stress-induced CMOS device | Zhijiong Luo, Qingqing Liang, Haizhou Yin | 2012-05-01 |
| 8158515 | Method of making 3D integrated circuits | Mukta G. Farooq, Subramanian S. Iyer, Steven J. Koester | 2012-04-17 |
| 8138497 | Test structure for detecting via contact shorting in shallow trench isolation regions | Shih-Fen Huang, Effendi Leobandung | 2012-03-20 |