Issued Patents All Time
Showing 276–300 of 534 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8592911 | Asymmetric semiconductor device having a high-k/metal gate and method of manufacturing the same | Qingqing Liang, Huicai Zhong | 2013-11-26 |
| 8587066 | Structure and method having asymmetrical junction or reverse halo profile for semiconductor on insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) | Zhijiong Luo, Qingqing Liang, Haizhou Yin | 2013-11-19 |
| 8575654 | Method of forming strained semiconductor channel and semiconductor device | Haizhou Yin, Zhijiong Luo | 2013-11-05 |
| 8564029 | Transistor and method for forming the same | Haizhou Yin, Zhijong Luo | 2013-10-22 |
| 8557677 | Stack-type semiconductor device and method for manufacturing the same | Qingqing Liang, Huicai Zhong, Chao Zhao | 2013-10-15 |
| 8552477 | FinFET with improved short channel effect and reduced parasitic capacitance | — | 2013-10-08 |
| 8552504 | Semiconductor device and method for forming the same | Zhijiong Luo, Haizhou Yin | 2013-10-08 |
| 8546241 | Semiconductor device with stress trench isolation and method for forming the same | Haizhou Yin, Zhijiong Luo | 2013-10-01 |
| 8546910 | Semiconductor structure and method for manufacturing the same | Haizhou Yin, Zhijiong Luo | 2013-10-01 |
| 8541305 | 3D integrated circuit and method of manufacturing the same | — | 2013-09-24 |
| 8541280 | Semiconductor structure and method for manufacturing the same | Haizhou Yin, Zhijiong Luo | 2013-09-24 |
| 8541293 | Method of controlled lateral etching | Zhijiong Luo, Haizhou Yin | 2013-09-24 |
| 8524565 | Semiconductor device and method for forming the same | Haizhou Yin, Zhijiong Luo | 2013-09-03 |
| 8507958 | Transistor and method for forming the same | Haizhou Yin, Zhijong Luo | 2013-08-13 |
| 8497168 | Structure and method to enhance both NFET and PFET performance using different kinds of stressed layers | Bruce B. Doris, Haining Yang | 2013-07-30 |
| 8497197 | Method for manufacturing a high-performance semiconductor structure with a replacement gate process and a stress memorization technique | Haizhou Yin, Zhijiong Luo | 2013-07-30 |
| 8492846 | Stress-generating shallow trench isolation structure having dual composition | Jing Wang | 2013-07-23 |
| 8492206 | Semiconductor device structure and method for manufacturing the same | Huicai Zhong, Jun Luo, Qingqing Liang | 2013-07-23 |
| 8492210 | Transistor, semiconductor device comprising the transistor and method for manufacturing the same | Qingqing Liang, Huicai Zhong | 2013-07-23 |
| 8492842 | Method for forming retrograded well for MOSFET | Zhijiong Luo, Qingqing Liang, Haizhou Yin | 2013-07-23 |
| 8481379 | Method for manufacturing fin field-effect transistor | Qingqing Liang, Huicai Zhong | 2013-07-09 |
| 8476139 | High performance MOSFET | Jing Wang | 2013-07-02 |
| 8470662 | Semiconductor device and method of manufacturing the same | Zhijiong Luo, Haizhou Yin | 2013-06-25 |
| 8466013 | Method for manufacturing a semiconductor structure | Haizhou Yin, Zhijiong Luo | 2013-06-18 |
| 8466500 | Semiconductor device and method for manufacturing the same | Qingqing Liang, Haizhou Yin, Zhijiong Luo | 2013-06-18 |