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Method for detecting address match in a deeply pipelined processor design |
Miles Robert Dooley, David A. Hrusecky, Sheldon B. Levenstein |
2013-10-01 |
| 7809924 |
System for generating effective address |
Rachel Flood, David A. Hrusecky, Sheldon B. Levenstein, Michael Thomas Vaden |
2010-10-05 |
| 7603543 |
Method, apparatus and program product for enhancing performance of an in-order processor with long stalls |
Miles Robert Dooley, Hung Q. Le, Sheldon B. Levenstein, Anthony Saporito |
2009-10-13 |
| 7571283 |
Mechanism in a multi-threaded microprocessor to maintain best case demand instruction redispatch |
Sheldon B. Levenstein, Bruce Joseph Ronchetti, Anthony Saporito |
2009-08-04 |
| 7380062 |
Mechanism in a multi-threaded microprocessor to maintain best case demand instruction redispatch |
Sheldon B. Levenstein, Bruce Joseph Ronchetti, Anthony Saporito |
2008-05-27 |
| 7360058 |
System and method for generating effective address |
Rachel Flood, David A. Hrusecky, Sheldon B. Levenstein, Michael Thomas Vaden |
2008-04-15 |
| 7120784 |
Thread-specific branch prediction by logically splitting branch history tables and predicted target address cache in a simultaneous multithreading processing environment |
Gregory W. Alexander, David S. Levitan, Balaram Sinharoy |
2006-10-10 |
| 7093111 |
Recovery of global history vector in the event of a non-branch flush |
Balaram Sinharoy |
2006-08-15 |