RV

Reinaldo Vega

IBM: 147 patents #301 of 70,183Top 1%
Globalfoundries: 15 patents #235 of 4,424Top 6%
TE Tessera: 3 patents #129 of 271Top 50%
RT Rochester Institute Of Technology: 1 patents #79 of 250Top 35%
SS Stmicroelectronics Sa: 1 patents #938 of 1,676Top 60%
📍 Mahopac, NY: #4 of 239 inventorsTop 2%
🗺 New York: #212 of 115,490 inventorsTop 1%
Overall (All Time): #5,060 of 4,157,543Top 1%
165
Patents All Time

Issued Patents All Time

Showing 151–165 of 165 patents

Patent #TitleCo-InventorsDate
8927375 Forming silicon-carbon embedded source/drain junctions with high substitutional carbon level Emre Alptekin, Abhishek Dube, Henry K. Utomo, Bei Liu 2015-01-06
8907405 Semiconductor structures with dual trench regions and methods of manufacturing the semiconductor structures Hongwen Yan 2014-12-09
8859388 Sealed shallow trench isolation region Michael V. Aquilino, Xiang Hu, Daniel Jaeger, Byeong Y. Kim, Yong Meng Lee +1 more 2014-10-14
8853862 Contact structures for semiconductor transistors Emre Alptekin 2014-10-07
8815693 FinFET device formation Emre Alptekin, Ravikumar Ramachandran, Viraj Y. Sardesai 2014-08-26
8704310 Trench isolation structure Michael V. Aquilino 2014-04-22
8652914 Two-step silicide formation Emre Alptekin, Sameer H. Jain 2014-02-18
8647954 Two-step silicide formation Emre Alptekin, Sameer H. Jain 2014-02-11
8643122 Silicide contacts having different shapes on regions of a semiconductor device Emre Alptekin, Dong-Ick Lee, Viraj Y. Sardesai, Cung D. Tran, Jian-Shen Yu +1 more 2014-02-04
8629510 Two-step silicide formation Emre Alptekin, Sameer H. Jain 2014-01-14
8623713 Trench isolation structure Michael V. Aquilino 2014-01-07
8614133 Structure and method to enabling a borderless contact to source regions and drain regions of a complementary metal oxide semiconductor (CMOS) transistor 2013-12-24
8421160 Structure and method to enabling a borderless contact to source regions and drain regions of a complementary metal oxide semiconductor (CMOS) transistor 2013-04-16
8415250 Method of forming silicide contacts of different shapes selectively on regions of a semiconductor device Emre Alptekin, Dong-Ick Lee, Viraj Y. Sardesai, Cung D. Tran, Jian-Shen Yu +1 more 2013-04-09
7548455 Multi-valued logic/memory cells and methods thereof Stephen Sudirgo 2009-06-16