Issued Patents All Time
Showing 501–525 of 581 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9466702 | Semiconductor device including multiple fin heights | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-10-11 |
| 9461146 | Overhang hardmask to prevent parasitic epitaxial nodules at gate end during source drain epitaxy | Kangguo Cheng, Shogo Mochizuki, Alexander Reznicek | 2016-10-04 |
| 9455336 | SiGe and Si FinFET structures and methods for making the same | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2016-09-27 |
| 9443948 | Gate-all-around nanowire MOSFET and method of formation | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2016-09-13 |
| 9443982 | Vertical transistor with air gap spacers | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-09-13 |
| 9437427 | Controlled confined lateral III-V epitaxy | Karthik Balakrishnan, Lukas Czornomaz, Alexander Reznicek | 2016-09-06 |
| 9437502 | Method to form stacked germanium nanowires and stacked III-V nanowires | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2016-09-06 |
| 9425291 | Stacked nanosheets by aspect ratio trapping | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-08-23 |
| 9425293 | Stacked nanowires with multi-threshold voltage solution for pFETs | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-08-23 |
| 9418841 | Type III-V and type IV semiconductor device formation | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2016-08-16 |
| 9419074 | Non-planar semiconductor device with aspect ratio trapping | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2016-08-16 |
| 9406748 | Perfectly shaped controlled nanowires | Karthik Balakrishnan, Kangguo Cheng, Bruce B. Doris, Alexander Reznicek | 2016-08-02 |
| 9406529 | Formation of FinFET junction | Kevin K. Chan, Ali Khakifirooz, John A. Ott, Alexander Reznicek | 2016-08-02 |
| 9406506 | Lattice matched aspect ratio trapping to reduce defects in III-V layer directly grown on silicon | Keith E. Fogel, Ali Khakifirooz, Alexander Reznicek | 2016-08-02 |
| 9391069 | MIM capacitor with enhanced capacitance formed by selective epitaxy | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek, Raghavasimhan Sreenivasan | 2016-07-12 |
| 9391077 | SiGe and Si FinFET structures and methods for making the same | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2016-07-12 |
| 9385218 | Method and structure for forming dielectric isolated FinFET with improved source/drain epitaxy | Kangguo Cheng, Alexander Reznicek | 2016-07-05 |
| 9379243 | Field-effect transistor with aggressively strained fins | Ali Khakifirooz, Alexander Reznicek | 2016-06-28 |
| 9379204 | Lattice matched aspect ratio trapping to reduce defects in III-V layer directly grown on silicon | Keith E. Fogel, Ali Khakifirooz, Alexander Reznicek | 2016-06-28 |
| 9379111 | Method of co-integration of strained silicon and strained germanium in semiconductor devices including fin structures | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2016-06-28 |
| 9373624 | FinFET devices including epitaxially grown device isolation regions, and a method of manufacturing same | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-06-21 |
| 9362383 | Highly scaled tunnel FET with tight pitch and method to fabricate same | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-06-07 |
| 9362182 | Forming strained fins of different material on a substrate | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2016-06-07 |
| 9356027 | Dual work function integration for stacked FinFET | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2016-05-31 |
| 9349868 | Gate all-around FinFET device and a method of manufacturing same | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2016-05-24 |