Issued Patents All Time
Showing 526–550 of 836 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9576128 | Interlinking routines with differing protections using stack indicators | — | 2017-02-21 |
| 9575890 | Supporting atomic accumulation with an addressable accumulator | Fadi Y. Busaba, Eric M. Schwarz | 2017-02-21 |
| 9569338 | Fingerprint-initiated trace extraction | Jonathan D. Bradbury, Giles R. Frazier, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum | 2017-02-14 |
| 9569190 | Compiling source code to reduce run-time execution of vector element reverse operations | William J. Schmidt | 2017-02-14 |
| 9569188 | Compiling source code to reduce run-time execution of vector element reverse operations | William J. Schmidt | 2017-02-14 |
| 9569127 | Computer instructions for limiting access violation reporting when accessing strings and similar data structures | Brett Olsson, Raul E. Silvera | 2017-02-14 |
| 9569115 | Transparent code patching | — | 2017-02-14 |
| 9563534 | Debugger display of vector register contents after compiler optimizations for vector instructions | William J. Schmidt | 2017-02-07 |
| 9563468 | Interprocessor memory status communication | Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel | 2017-02-07 |
| 9563467 | Interprocessor memory status communication | Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum, Timothy J. Slegel | 2017-02-07 |
| 9563427 | Relative offset branching in a fixed-width reduced instruction set computing architecture | — | 2017-02-07 |
| 9557917 | Conditional stack frame allocation | Ronald I. McIntosh, Ulrich Weigand | 2017-01-31 |
| 9552278 | Configurable code fingerprint | Giles R. Frazier, Christian Jacobi, Chung-Lung K. Shum | 2017-01-24 |
| 9552158 | Conditional stack frame allocation | Ronald I. McIntosh, Ulrich Weigand | 2017-01-24 |
| 9547595 | Salvaging lock elision transactions | Harold W. Cain, III, Maged M. Michael, Chung-Lung K. Shum | 2017-01-17 |
| 9547494 | Absolute address branching in a fixed-width reduced instruction set computing architecture | — | 2017-01-17 |
| 9547484 | Automated compiler operation verification | Giles R. Frazier, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum, Joran S. C. Siu | 2017-01-17 |
| 9535703 | Predictor data structure for use in pipelined processing | Valentina Salapura | 2017-01-03 |
| 9535696 | Instruction to cancel outstanding cache prefetches | Maged M. Michael, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum | 2017-01-03 |
| 9535608 | Memory access request for a memory protocol | Fadi Y. Busaba, Harold W. Cain, III, Valentina Salapura, Timothy J. Slegel | 2017-01-03 |
| 9524257 | Transactional execution enabled supervisor call interruption while in TX mode | Jonathan D. Bradbury, Dan F. Greiner, Chung-Lung K. Shum | 2016-12-20 |
| 9524205 | Code fingerprint-based processor malfunction detection | Giles R. Frazier, Christian Jacobi, Anthony Saporito, Chung-Lung K. Shum | 2016-12-20 |
| 9524196 | Adaptive process for data sharing with selection of lock elision and locking | Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum | 2016-12-20 |
| 9524195 | Adaptive process for data sharing with selection of lock elision and locking | Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum | 2016-12-20 |
| 9524188 | Multithreaded transactions | Fadi Y. Busaba, Valentina Salapura, Eric M. Schwarz, Chung-Lung K. Shum | 2016-12-20 |