MG

Michael C. Gaidis

IBM: 64 patents #1,202 of 70,183Top 2%
Infineon Technologies Ag: 5 patents #1,696 of 7,486Top 25%
CT Crocus Technology: 2 patents #16 of 35Top 50%
📍 San Jose, CA: #619 of 32,062 inventorsTop 2%
🗺 California: #5,035 of 386,348 inventorsTop 2%
Overall (All Time): #33,915 of 4,157,543Top 1%
65
Patents All Time

Issued Patents All Time

Showing 51–65 of 65 patents

Patent #TitleCo-InventorsDate
7488661 Device and method for improving interface adhesion in thin film structures Keith Milkove 2009-02-10
7442647 Structure and method for formation of cladded interconnects for MRAMs Sivananda K. Kanakasabapathy, Eugene J. O'Sullivan, Michael F. Lofaro 2008-10-28
7399646 Magnetic devices and techniques for formation thereof Sivananda K. Kanakasabapathy 2008-07-15
7381343 Hard mask structure for patterning of materials Sivananda K. Kanakasabapathy, Eugene J. O'Sullivan 2008-06-03
7330371 Method and structure for generating offset fields for use in MRAM devices Philip L. Trouilloud 2008-02-12
7259025 Ferromagnetic liner for conductive lines of magnetic memory cells Rainer Leuschner, Judith M. Rubino, Lubomyr T. Romankiw 2007-08-21
7241668 Planar magnetic tunnel junction substrate having recessed alignment marks 2007-07-10
7211446 Method of patterning a magnetic tunnel junction stack for a magneto-resistive random access memory David W. Abraham, Stephen L. Brown, Arunava Gupta, Chanro Park, Wolfgang Raberg 2007-05-01
7133309 Method and structure for generating offset fields for use in MRAM devices Philip L. Trouilloud 2006-11-07
7033881 Method for fabricating magnetic field concentrators as liners around conductive wires in microelectronic devices Phillip L. Trouilloud, Sivananda K. Kanakasabapathy, David W. Abraham 2006-04-25
6974770 Self-aligned mask to reduce cell layout area Gregory Costrini, Kia-Seng Low, David L. Rath, Walter Glashauser 2005-12-13
6933204 Method for improved alignment of magnetic tunnel junction elements Chandrasekhar Sarma, Sivananda K. Kanakasabapathy, Ihar Kasko, Greg Costrini, John P. Hummel 2005-08-23
6812141 Recessed metal lines for protective enclosure in integrated circuits Joachim Nuetzel, Walter Glashauser, Eugene J. O'Sullivan, Gregory Costrini, Stephen L. Brown +2 more 2004-11-02
6784091 Maskless array protection process flow for forming interconnect vias in magnetic random access memory devices Joachim Nuetzel, Christian Arndt, Greg Costrini, Xian Jay Ning 2004-08-31
6660568 BiLevel metallization for embedded back end of the line structures 2003-12-09