KF

Keith E. Fogel

IBM: 260 patents #100 of 70,183Top 1%
Globalfoundries: 11 patents #330 of 4,424Top 8%
KT King Abdulaziz City For Science And Technology: 8 patents #16 of 573Top 3%
EC Egypt Nanotechnology Center: 2 patents #17 of 29Top 60%
IM International Machines: 1 patents #1 of 34Top 3%
ST S.O.I. Tec Silicon On Insulator Technologies: 1 patents #92 of 155Top 60%
📍 Hopewell Junction, NY: #2 of 648 inventorsTop 1%
🗺 New York: #74 of 115,490 inventorsTop 1%
Overall (All Time): #1,636 of 4,157,543Top 1%
272
Patents All Time

Issued Patents All Time

Showing 51–75 of 272 patents

Patent #TitleCo-InventorsDate
10026618 Method for improving quality of spalled material layers Stephen W. Bedell, Paul A. Lauro, Ning Li, Devendra K. Sadana, Katherine L. Saenger +1 more 2018-07-17
10020418 Simplified process for vertical LED manufacturing Stephen W. Bedell, Paul A. Lauro, Devendra K. Sadana 2018-07-10
9997590 FinFET resistor and method to fabricate same Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten 2018-06-12
9947529 Porous fin as compliant medium to form dislocation-free heteroepitaxial films Kangguo Cheng, Jeehwan Kim, Devendra K. Sadana 2018-04-17
9935215 Transparent conductive electrode for three dimensional photovoltaic device Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana 2018-04-03
9929313 Protective capping layer for spalled gallium nitride Stephen W. Bedell, Paul A. Lauro, Devendra K. Sadana 2018-03-27
9922941 Thin low defect relaxed silicon germanium layers on bulk silicon substrates Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten 2018-03-20
9918382 Patterned metallization handle layer for controlled spalling Turki bin Saud bin Mohammed Al-Saud, Stephen W. Bedell, Paul A. Lauro, Devendra K. Sadana 2018-03-13
9905649 Tensile strained nFET and compressively strained pFET formed on strain relaxed buffer Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek 2018-02-27
9893014 Designable channel FinFET fuse Pouya Hashemi, Shogo Mochizuki, Alexander Reznicek 2018-02-13
9887265 MOSFET with ultra low drain leakage Joel P. de Souza, Jeehwan Kim, Devendra K. Sadana 2018-02-06
9876129 Cone-shaped holes for high efficiency thin film solar cells Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana 2018-01-23
9818909 LED light extraction enhancement enabled using self-assembled particles patterned surface Jeehwan Kim, Ning Li, Devendra K. Sadana 2017-11-14
9799747 Low resistance contact for semiconductor devices Joel P. de Souza, Jeehwan Kim, Devendra K. Sadana, Brent A. Wacaser 2017-10-24
9799600 Nickel-silicon fuse for FinFET structures Kangguo Cheng, Pouya Hashemi, Alexander Reznicek 2017-10-24
9793114 Uniform height tall fins with varying silicon germanium concentrations Stephen W. Bedell, Bruce B. Doris, Alexander Reznicek 2017-10-17
9768254 Leakage-free implantation-free ETSOI transistors Joel P. de Souza, Jeehwan Kim, Devendra K. Sadana 2017-09-19
9768262 Embedded carbon-doped germanium as stressor for germanium nFET devices Jeffrey L. Dittmar, Sebastian Naczas, Alexander Reznicek, Devendra K. Sadana 2017-09-19
9754875 Designable channel FinFET fuse Pouya Hashemi, Shogo Mochizuki, Alexander Reznicek 2017-09-05
9748353 Method of making a gallium nitride device Stephen W. Bedell, Paul A. Lauro, Devendra K. Sadana 2017-08-29
9741880 Three-dimensional conductive electrode for solar cell Augustin J. Hong, Jeehwan Kim, Devendra K. Sadana 2017-08-22
9741807 FinFET device with vertical silicide on recessed source/drain epitaxy regions Pranita Kerber, Qiqing C. Ouyang, Alexander Reznicek 2017-08-22
9722033 Doped zinc oxide as n+ layer for semiconductor devices Joel P. Desouza, Jeehwan Kim, Ko-Tao Lee, Devendra K. Sadana 2017-08-01
9722039 Fabricating high-power devices Stephen W. Bedell, Paul A. Lauro, Devendra K. Sadana 2017-08-01
9716207 Low reflection electrode for photovoltaic devices Jeehwan Kim, David B. Mitzi, Mark T. Winkler 2017-07-25