Issued Patents All Time
Showing 51–75 of 85 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8648403 | Dynamic memory cell structures | Wing K. Luk | 2014-02-11 |
| 8604532 | Computing apparatus employing dynamic memory cell structures | Win K. Luk | 2013-12-10 |
| 8603876 | Dynamic memory cell methods | Win K. Luk | 2013-12-10 |
| 8586441 | Germanium lateral bipolar junction transistor | Kevin K. Chan, Christopher P. D'Emic, Bahman Hekmatshoartabari, Tak H. Ning, Dae-Gyu Park | 2013-11-19 |
| 8572616 | Apparatus, system, and method for managing z/OS batch jobs with prerequisites | Pedro Sanchez Vera | 2013-10-29 |
| 8558282 | Germanium lateral bipolar junction transistor | Kevin K. Chan, Christopher P. D'Emic, Bahman Hekmatshoartabari, Tak H. Ning, Dae-Gyu Park | 2013-10-15 |
| 8557670 | SOI lateral bipolar junction transistor having a wide band gap emitter contact | Kevin K. Chan, Christopher P. D'Emic, Tak H. Ning, Dae-Gyu Park | 2013-10-15 |
| 8541835 | Schottky FET fabricated with gate last process | Dechao Guo, Marwan H. Khater, Christian Lavoie, Zhen Zhang | 2013-09-24 |
| 8530287 | ETSOI CMOS with back gates | Robert H. Dennard, Ali Khakifirooz | 2013-09-10 |
| 8531001 | Complementary bipolar inverter | Robert H. Dennard, Wilfried E. Haensch, Tak H. Ning | 2013-09-10 |
| 8526220 | Complementary SOI lateral bipolar for SRAM in a low-voltage CMOS platform | Tak H. Ning | 2013-09-03 |
| 8492794 | Vertical polysilicon-germanium heterojunction bipolar transistor | Kevin K. Chan, Wilfried E. Haensch, Tak H. Ning | 2013-07-23 |
| 8466473 | Structure and method for Vt tuning and short channel control with high k/metal gate MOSFETs | Xiangdong Chen, Xinlin Wang | 2013-06-18 |
| 8445356 | Integrated circuit having back gating, improved isolation and reduced well resistance and method to fabricate same | Kangguo Cheng, Ali Khakifirooz, Pranita Kulkarni | 2013-05-21 |
| 8441084 | Horizontal polysilicon-germanium heterojunction bipolar transistor | Kevin K. Chan, Wilfried E. Haensch, Tak H. Ning | 2013-05-14 |
| 8420469 | Schottky FET fabricated with gate last process | Dechao Guo, Marwan H. Khater, Christian Lavoie, Zhen Zhang | 2013-04-16 |
| 8415744 | SOI CMOS circuits with substrate bias | Wilfried E. Haensch, Tak H. Ning | 2013-04-09 |
| 8415743 | ETSOI CMOS with back gates | Robert H. Dennard, Ali Khakifirooz | 2013-04-09 |
| 8361872 | High performance low power bulk FET device and method of manufacture | Toshiharu Furukawa, Robert R. Robison | 2013-01-29 |
| 8349684 | Semiconductor device with high K dielectric control terminal spacer structure | Amlan Majumdar, Ramachandran Muralidhar, Ghavam G. Shahidi | 2013-01-08 |
| 8329564 | Method for fabricating super-steep retrograde well MOSFET on SOI or bulk silicon substrate, and device fabricated in accordance with the method | Amlan Majumdar, Tak H. Ning, Zhibin Ren | 2012-12-11 |
| 8314463 | Method for fabricating super-steep retrograde well MOSFET on SOI or bulk silicon substrate, and device fabricated in accordance with the method | Amlan Majumdar, Tak H. Ning, Zhibin Ren | 2012-11-20 |
| 8304306 | Fabrication of devices having different interfacial oxide thickness via lateral oxidation | Eduard A. Cartier, Martin M. Frank, Marwan H. Khater | 2012-11-06 |
| 8106458 | SOI CMOS circuits with substrate bias | Wilfried E. Haensch, Tak H. Ning | 2012-01-31 |
| 7985633 | Embedded DRAM integrated circuits with extremely thin silicon-on-insulator pass transistors | Josephine B. Chang, Leland Chang, Brian L. Ji, Steven J. Koester, Amlan Majumdar | 2011-07-26 |