HC

Howard H. Chen

IBM: 38 patents #2,506 of 70,183Top 4%
IN Intel: 5 patents #7,174 of 30,777Top 25%
📍 Sunnyvale, CA: #436 of 14,302 inventorsTop 4%
🗺 California: #10,163 of 386,348 inventorsTop 3%
Overall (All Time): #70,504 of 4,157,543Top 2%
43
Patents All Time

Issued Patents All Time

Showing 26–43 of 43 patents

Patent #TitleCo-InventorsDate
7405108 Methods for forming co-planar wafer-scale chip packages Lloyd Burrell, Louis L. Hsu, Wolfgang Sauter 2008-07-29
7399686 Method and apparatus for making coplanar dielectrically-isolated regions of different semiconductor materials on a substrate Louis L. Hsu, Jack A. Mandelman 2008-07-15
7369410 Apparatuses for dissipating heat from semiconductor devices Hsichang Liu, Louis L. Hsu, Lawrence S. Mok 2008-05-06
7335599 Method and apparatus for making coplanar isolated regions of different semiconductor materials on a substrate Louis L. Hsu, Jack A. Mandelman 2008-02-26
7214910 On-chip power supply regulator and temperature control system William J. Ferrante, Louis L. Hsu, Carl Radens 2007-05-08
7170164 Cooling system for a semiconductor device and method of fabricating same Louis L. Hsu, Joseph F. Shepard, Jr. 2007-01-30
7098070 Device and method for fabricating double-sided SOI wafer scale package with through via connections Louis L. Hsu 2006-08-29
7086020 Circuits and methods for matching device characteristics for analog and mixed-signal designs Louis L. Hsu, Charlie C. Hwang 2006-08-01
7029951 Cooling system for a semiconductor device and method of fabricating same Louis L. Hsu, Joseph F. Shepard, Jr. 2006-04-18
7005319 Global planarization of wafer scale package with precision die thickness control Louis L. Hsu, Brian L. Ji 2006-02-28
6910165 Digital random noise generator Li-Kong Wang, Louis L. Hsu, Sang Hoo Dhong, Tin-Chee Lo 2005-06-21
6865722 Method of automating chip power consumption estimation calculation Joachim Clabes, Gricell Co, James Scott Neely, Michael Fan Wang 2005-03-08
6825534 Semiconductor device on a combination bulk silicon and silicon-on-insulator (SOI) substrate Louis L. Hsu, Li-Kong Wang 2004-11-30
6823293 Hierarchical power supply noise monitoring device and system for very large scale integrated circuits Louis L. Hsu, Brian L. Ji, Li-Kong Wang 2004-11-23
6781185 Semiconductor high dielectric constant decoupling capacitor structures and process for fabrication Louis L. Hsu, Li-Kong Wang 2004-08-24
6728916 Hierarchical built-in self-test for system-on-chip design Louis L. Hsu, Li-Kong Wang 2004-04-27
6603690 Low-power static column redundancy scheme for semiconductor memories Louis L. Hsu, Li-Kong Wang 2003-08-05
6214653 Method for fabricating complementary metal oxide semiconductor (CMOS) devices on a mixed bulk and silicon-on-insulator (SOI) substrate Louis L. Hsu, Li-Kong Wang 2001-04-10