Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5976970 | Method of making and laterally filling key hole structure for ultra fine pitch conductor lines | Hazara S. Rathore | 1999-11-02 |
| 5976975 | Refractory metal capped low resistivity metal conductor lines and vias | Rajiv V. Joshi, Jerome J. Cuomo, Louis L. Hsu | 1999-11-02 |
| 5922496 | Selective deposition mask and method for making the same | Gene J. Gaudenzi, Frederic Pierre, Georges Robert | 1999-07-13 |
| 5889328 | Refractory metal capped low resistivity metal conductor lines and vias | Rajiv V. Joshi, Jerome J. Cuomo, Louis L. Hsu | 1999-03-30 |
| 5808853 | Capacitor with multi-level interconnection technology | Gene J. Gaudenzi, Rebecca Y. Gorrell, Mark A. Takacs, Kenneth J. Travis, Jr. | 1998-09-15 |
| 5796591 | Direct chip attach circuit card | Kenneth Michael Fallon | 1998-08-18 |
| 5729896 | Method for attaching a flip chip on flexible circuit carrier using chip with metallic cap on solder | Kenneth Michael Fallon, Gene J. Gaudenzi, Cynthia S. Milkovich | 1998-03-24 |
| 5634268 | Method for making direct chip attach circuit card | Kenneth Michael Fallon, Gene J. Gaudenzi | 1997-06-03 |
| 5585673 | Refractory metal capped low resistivity metal conductor lines and vias | Rajiv V. Joshi, Jerome J. Cuomo, Louis L. Hsu | 1996-12-17 |
| 5470788 | Method of making self-aligned, lateral diffusion barrier in metal lines to eliminate electromigration | Glenn A. Biery, Daniel M. Boyne | 1995-11-28 |
| 5434451 | Tungsten liner process for simultaneous formation of integral contact studs and interconnect lines | Kevin Hutchings, Hazara S. Rathore | 1995-07-18 |
| 5427983 | Process for corrosion free multi-layer metal conductors | Umar M. Ahmad, Harsaran S. Bhatia, Satya Pal Singh Bhatia, William H. Price, Sampath Purushothaman | 1995-06-27 |
| 5426330 | Refractory metal capped low resistivity metal conductor lines and vias | Rajiv V. Joshi, Jerome J. Cuomo, Louis L. Hsu | 1995-06-20 |
| 5403779 | Refractory metal capped low resistivity metal conductor lines and vias formed using PVD and CVD | Rajiv V. Joshi, Jerome J. Cuomo, Louis L. Hsu | 1995-04-04 |
| 5401677 | Method of metal silicide formation in integrated circuit devices | Robert D. Bailey, Cyril Cabral, Jr., Brian T. Cunningham, James M. E. Harper, Viraj Y. Sardesai +2 more | 1995-03-28 |
| 5300813 | Refractory metal capped low resistivity metal conductor lines and vias | Rajiv V. Joshi, Jerome J. Cuomo, Louis L. Hsu | 1994-04-05 |
| 4831494 | Multilayer capacitor | Allen J. Arnold, Michael E. Bariether, Shin-Wu Chiang, Robert A. Miller, Frank A. Montegari +2 more | 1989-05-16 |
| 4379832 | Method for making low barrier Schottky devices of the electron beam evaporation of reactive metals | John J. Lowney | 1983-04-12 |
| 4215156 | Method for fabricating tantalum semiconductor contacts | Majid Ghafghaichi, Lucian A. Kasprzak, Hans Wimpfheimer | 1980-07-29 |
| 4214256 | Tantalum semiconductor contacts and method for fabricating same | Majid Ghafghaichi, Lucian A. Kasprzak, Hans Wimpfheimer | 1980-07-22 |