Issued Patents All Time
Showing 51–75 of 96 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7404114 | System and method for balancing delay of signal communication paths through well voltage adjustment | Joseph A. Iadanza, Sebastian T. Ventrone | 2008-07-22 |
| 7403039 | Flexible multimode logic element for use in a configurable mixed-logic signal distribution path | Igor Arsovski, Anthony R. Bonaccio, Joseph A. Iadanza, Pradeep Thiagarajan, Sebastian T. Ventrone | 2008-07-22 |
| 7397876 | Methods and arrangements for link power reduction | Gareth John Nicholls, Vernon R. Norman, Martin Schmatz, Karl D. Selander, Michael A. Sorna | 2008-07-08 |
| 7394273 | On-chip electromigration monitoring system | Louis L. Hsu, Oleg Gluschenkov, James S. Mason, Michael A. Sorna, Chih-Chao Yang | 2008-07-01 |
| 7391271 | Adjustment of PLL bandwidth for jitter control using feedback circuitry | Ram Kelkar, Anjali R. Malladi, Martin Schmatz, Nina A. Shah | 2008-06-24 |
| 7389192 | Determining data signal jitter via asynchronous sampling | Fadi H. Gebara, Jeremy D. Schaub | 2008-06-17 |
| 7383160 | Method and apparatus for constructing a synchronous signal diagram from asynchronously sampled data | Fadi H. Gebara, Jeremy D. Schaub | 2008-06-03 |
| 7362138 | Flexible multimode logic element for use in a configurable mixed-logic signal distribution path | Igor Arsovski, Anthony R. Bonaccio, Joseph A. Iadanza, Pradeep Thiagarajan, Sebastian T. Ventrone | 2008-04-22 |
| 7349498 | Method and system for data and edge detection with correlation tables | Vernon R. Norman, Martin Schmatz | 2008-03-25 |
| 7346094 | System and method for transmitting data and additional information simultaneously within a wire based communication system | Martin Schmatz | 2008-03-18 |
| 7339390 | Systems and methods for controlling of electro-migration | Louis L. Hsu, James S. Mason, Chih-Chao Yang | 2008-03-04 |
| 7340660 | Method and system for using statistical signatures for testing high-speed circuits | Vernon R. Norman, Martin Schmatz | 2008-03-04 |
| 7332932 | Serial link receiver with wide input voltage range and tolerance to high power voltage supply | Westerfield J. Ficken, David A. Freitas, Joseph M. Stevens | 2008-02-19 |
| 7317777 | Digital adaptive control loop for data deserialization | Vernon R. Norman, Martin Schmatz | 2008-01-08 |
| 7315594 | Clock data recovering system with external early/late input | Martin Schmatz, Vernon R. Norman | 2008-01-01 |
| 7305571 | Power network reconfiguration using MEM switches | Louis L. Hsu, James S. Mason | 2007-12-04 |
| 7300807 | Structure and method for providing precision passive elements | Douglas D. Coolbaugh, Terence B. Hook, Anthony K. Stamper | 2007-11-27 |
| 7295604 | Method for determining jitter of a signal in a serial link and high speed serial link | Marcel A. Kossel, Vernon R. Norman, Martin Schmatz | 2007-11-13 |
| 7289572 | Method and system for scalable pre-driver to driver interface | Westerfield J. Ficken | 2007-10-30 |
| 7286947 | Method and apparatus for determining jitter and pulse width from clock signal comparisons | Fadi H. Gebara, Jeremy D. Schaub | 2007-10-23 |
| 7286620 | Equalizer for reduced intersymbol interference via partial clock switching | Westerfield J. Ficken, Wentai Liu | 2007-10-23 |
| 7279950 | Method and system for high frequency clock signal gating | Stacy Garvin, Vernon R. Norman, Samuel T. Ray, Wayne Utter | 2007-10-09 |
| 7268613 | Transistor switch with integral body connection to prevent latchup | Stacy Garvin, Todd M. Rasmus | 2007-09-11 |
| 7268632 | Structure and method for providing gate leakage isolation locally within analog circuits | Anthony R. Bonaccio, Joseph A. Iadanza, Stephen D. Wyatt | 2007-09-11 |
| 7218135 | Method and apparatus for reducing noise in a dynamic manner | Igor Arsovski, Joseph A. Iadanza, Sebastian T. Ventrone | 2007-05-15 |