Issued Patents All Time
Showing 76–96 of 96 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7149269 | Receiver for clock and data recovery and method for calibrating sampling phases in a receiver for clock and data recovery | Vernon R. Norman, Martin Schmatz | 2006-12-12 |
| 7142624 | Analog unidirectional serial link architecture | Stacy Garvin, Vernon R. Norman, Paul Owczarski, Martin Schmatz, Joseph M. Stevens | 2006-11-28 |
| 7088766 | Dynamic measurement of communication channel characteristics using direct sequence spread spectrum (DSSS) systems, methods and program products | Carrie E. Aust, Martin Schmatz | 2006-08-08 |
| 7081842 | Electronic component value trimming systems | Louis L. Hsu, James S. Mason, Gareth John Nicholls, Philip J. Murfet, Samuel T. Ray | 2006-07-25 |
| 7082484 | Architecture for advanced serial link between two cards | Vernon R. Norman, Martin Schmatz | 2006-07-25 |
| 7053712 | Method and apparatus for controlling common-mode output voltage in fully differential amplifiers | Anthony R. Bonaccio, Michael A. Sorna, Sebastian T. Ventrone | 2006-05-30 |
| 7042277 | Circuit and method for reducing jitter in a PLL of high speed serial links | Stacy Garvin, Vernon R. Norman, Todd M. Rasmus | 2006-05-09 |
| 7034566 | Method and circuit for increased noise immunity for clocking signals in high speed digital systems | Joseph M. Stevens | 2006-04-25 |
| 6999544 | Apparatus and method for oversampling with evenly spaced samples | Vernon R. Norman, Martin Schmatz | 2006-02-14 |
| 6993107 | Analog unidirectional serial link architecture | Stacy Garvin, Vernon R. Norman, Paul Owczarski, Martin Schmatz, Joseph M. Stevens | 2006-01-31 |
| 6970529 | Unified digital architecture | Vernon R. Norman, Martin Schmatz | 2005-11-29 |
| 6968413 | Method and system for configuring terminators in a serial communication system | Westerfield J. Ficken, Paul Owczarski | 2005-11-22 |
| 6717997 | Apparatus and method for current demand distribution in electronic systems | Joseph A. Iadanza | 2004-04-06 |
| 6332166 | Adaptive interface apparatus and method for data terminal elements in a communication network transmitting and receiving ethernet over a shielded twisted pair cabling system | Joseph Ronald Efferson, Jr., Theodore Gary, Steven H. Johnson, Gregg Kreielsheimer, Mark Edmund Scheuer | 2001-12-18 |
| 6298458 | System and method for manufacturing test of a physical layer transceiver | Eirik L. Gude, Joseph A. Iadanza, Paul Owczarski, Jonathan H. Raymond | 2001-10-02 |
| 6275094 | CMOS device and circuit and method of operation dynamically controlling threshold voltage | Geoffrey B. Stephens | 2001-08-14 |
| 6087861 | Data network drivers including balanced current supplies and related methods | Jonathan H. Raymond, Randall S. Smith, Stephen D. Wyatt | 2000-07-11 |
| 6031394 | Low voltage CMOS circuit for on/off chip drive at high voltage | Stacy Garvin, Geoffrey B. Stephens | 2000-02-29 |
| 5942999 | Controllable integrated linear attenuator for a D/A converter | Raymond Paul Rizzo | 1999-08-24 |
| 5872446 | Low voltage CMOS analog multiplier with extended input dynamic range | Ronald S. Gyurcsik, James Francis McElwee | 1999-02-16 |
| 4536720 | Programmable oscillator with power down feature and frequency adjustment | Stacy Garvin | 1985-08-20 |