| 6275094 |
CMOS device and circuit and method of operation dynamically controlling threshold voltage |
Hayden C. Cranford, Jr. |
2001-08-14 |
| 6031394 |
Low voltage CMOS circuit for on/off chip drive at high voltage |
Hayden C. Cranford, Jr., Stacy Garvin |
2000-02-29 |
| 5939897 |
Method and apparatus for testing quiescent current in integrated circuits |
Robert Lee Ayers |
1999-08-17 |
| 5760598 |
Method and apparatus for testing quiescent current in integrated circuits |
Robert Lee Ayers |
1998-06-02 |
| 5453705 |
Reduced power VLSI chip and driver circuit |
Francois Ibrahim Atallah, Anthony Correale, Jr., Charles K. Robinson |
1995-09-26 |
| 5424659 |
Mixed voltage output buffer circuit |
Scott J. Tucker |
1995-06-13 |
| 4656729 |
Dual electron injection structure and process with self-limiting oxidation barrier |
Charles T. Kroll |
1987-04-14 |
| 4481566 |
On chip charge trap compensated high voltage converter |
Charles R. Hoffman |
1984-11-06 |
| 4458407 |
Process for fabricating semi-conductive oxide between two poly silicon gate electrodes |
Anthony J. Hoeg, Jr., Charles T. Kroll |
1984-07-10 |
| 4429237 |
High voltage on chip FET driver |
Hayden C. Cranford, Jr., Charles R. Hoffman |
1984-01-31 |
| 4412376 |
Fabrication method for vertical PNP structure with Schottky barrier diode emitter utilizing ion implantation |
David E. De Bar, Raymond W. Hamaker |
1983-11-01 |
| 4404577 |
Electrically alterable read only memory cell |
Hayden C. Cranford, Jr., Charles R. Hoffman |
1983-09-13 |
| 4395812 |
Forming an integrated circuit |
David L. Bergeron |
1983-08-02 |
| 4373166 |
Schottky Barrier diode with controlled characteristics |
D. L. Bergeron, Daniel Fleming |
1983-02-08 |
| 4357178 |
Schottky barrier diode with controlled characteristics and fabrication method |
David L. Bergeron, Daniel Fleming |
1982-11-02 |
| 4326212 |
Structure and process for optimizing the characteristics of I.sup.2 L devices |
David L. Bergeron, Zimri C. Putney |
1982-04-20 |
| 4314267 |
Dense high performance JFET compatible with NPN transistor formation and merged BIFET |
David L. Bergeron |
1982-02-02 |
| 4289834 |
Dense dry etched multi-level metallurgy with non-overlapped vias |
George E. Alcorn, Raymond W. Hamaker |
1981-09-15 |
| 4229753 |
Voltage compensation of temperature coefficient of resistance in an integrated circuit resistor |
David L. Bergeron |
1980-10-21 |
| 4201800 |
Hardened photoresist master image mask process |
George E. Alcorn, David L. Bergeron |
1980-05-06 |
