Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7352755 | Network interface card (NIC) with phase lock rise time control generating circuit | Hayden C. Cranford, Jr. | 2008-04-01 |
| 7170958 | Method and apparatus for adaptive equalization of high speed data communications | Louis Regniere | 2007-01-30 |
| 6721379 | DAC/Driver waveform generator with phase lock rise time control | Hayden C. Cranford, Jr. | 2004-04-13 |
| 6650661 | System that compensates for variances due to process and temperature changes | Brian Buchanan, Carl Thomas Gray, Christopher G. Riedle | 2003-11-18 |
| 6249164 | Delay circuit arrangement for use in a DAC/driver waveform generator with phase lock rise time control | Hayden C. Cranford, Jr. | 2001-06-19 |
| 6222380 | High speed parallel/serial link for data communication | Robert Glen Gerowitz, Carl Thomas Gray, John Marshall, Christopher G. Riedle | 2001-04-24 |
| 5942999 | Controllable integrated linear attenuator for a D/A converter | Hayden C. Cranford, Jr. | 1999-08-24 |
| 5604466 | On-chip voltage controlled oscillator | Daniel M. Dreps | 1997-02-18 |
| 5508664 | Oscillators having charge/discharge circuits with adjustment to maintain desired duty cycles | — | 1996-04-16 |
| 5490282 | Interface having serializer including oscillator operating at first frequency and deserializer including oscillator operating at second frequency equals half first frequency for minimizing frequency interference | Daniel M. Dreps | 1996-02-06 |
| 5295161 | Fiber optic amplifier with active elements feedback circuit | Daniel M. Dreps | 1994-03-15 |
| 5039952 | Electronic gain cell | Daniel M. Dreps | 1991-08-13 |
| 4787097 | NRZ phase-locked loop circuit with associated monitor and recovery circuitry | — | 1988-11-22 |