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Testing integrated circuit designs containing multiple phase rotators |
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Testing integrated circuit designs containing multiple phase rotators |
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Testing integrated circuit designs containing multiple phase rotators |
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Testing integrated circuit designs containing multiple phase rotators |
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Validating manufacturing test rules pertaining to an electronic component |
Carisa Anne Cassani, Michael Patrick Muhlada, Chad Everett Winemiller |
2012-03-13 |
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Indeterminate state logic insertion |
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2012-03-13 |
| 8065641 |
Automatically creating manufacturing test rules pertaining to an electronic component |
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Scanned memory testing of multi-port memory arrays |
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Multiplexor with leakage power regulator |
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2010-08-03 |
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Method and system for low-power level-sensitive scan design latch with power-gated logic |
Zhibin Cheng, Claudia M. Tartevet |
2010-01-12 |
| 7506225 |
Scanned memory testing of multi-port memory arrays |
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2009-03-17 |
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R. Thomas Cruz, Claudia M. Tartevet |
2006-10-24 |
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Scan chain connectivity |
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2004-01-20 |
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2003-02-11 |
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