Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11157415 | Operation of a multi-slice processor implementing a unified page walk cache | Dwain A. Hicks, George W. Rohrbaugh, III, Shih-Hsiung S. Tung | 2021-10-26 |
| 10824494 | Operation of a multi-slice processor implementing exception handling in a nested translation environment | Dwain A. Hicks, Shih-Hsiung S. Tung | 2020-11-03 |
| 10534715 | Operation of a multi-slice processor implementing a unified page walk cache | Dwain A. Hicks, George W. Rohrbaugh, III, Shih-Hsiung S. Tung | 2020-01-14 |
| 10042691 | Operation of a multi-slice processor implementing exception handling in a nested translation environment | Dwain A. Hicks, Shih-Hsiung S. Tung | 2018-08-07 |
| 8988139 | Self-selected variable power integrated circuit | Nghia V. Phan, Peter A. Sandon | 2015-03-24 |
| 7225387 | Multilevel parallel CRC generation and checking circuit | Ming-i Mark Lin, Brian J. Connolly, Todd E. Leonard, Gregory J. Mann | 2007-05-29 |
| 6298458 | System and method for manufacturing test of a physical layer transceiver | Hayden C. Cranford, Jr., Eirik L. Gude, Joseph A. Iadanza, Paul Owczarski | 2001-10-02 |
| 6087861 | Data network drivers including balanced current supplies and related methods | Hayden C. Cranford, Jr., Randall S. Smith, Stephen D. Wyatt | 2000-07-11 |
| 5737578 | Apparatus and method for partitioning multiport rams | Eric T. Hennenhoefer | 1998-04-07 |
| 5712806 | Optimized multiplexer structure for emulation systems | Eric T. Hennenhoefer | 1998-01-27 |
| 5630078 | Personal computer with processor reset control | Daniel P. Fuoco, Luis A. Hernandez, Eric C. Mathisen, Dennis Moeller, Esmaeil Tashakori | 1997-05-13 |
| 5537600 | Personal computer with alternate system controller | Daniel P. Fuoco, Luis A. Hernandez, Eric C. Mathisen, Dennis Moeller, Esmaeil Tashakori | 1996-07-16 |
| 5353417 | Personal computer with bus interface controller coupled directly with local processor and input/output data buses and for anticipating memory control changes on arbitration for bus access | Daniel P. Fuoco, Luis A. Hernandez, Eric C. Mathisen, Dennis Moeller, Esmaeil Tashakori | 1994-10-04 |
| 5300831 | Logic macro and protocol for reduced power consumption during idle state | Dac C. Pham, Sebastian T. Ventrone | 1994-04-05 |