Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11561243 | Compliant organic substrate assembly for rigid probes | David M. Audette, Grant Wagner, Marc D. Knox | 2023-01-24 |
| 11322473 | Interconnect and tuning thereof | David M. Audette, Grant Wagner, Marc D. Knox | 2022-05-03 |
| 11029334 | Low force wafer test probe | David M. Audette, Marc D. Knox, Grant Wagner | 2021-06-08 |
| 11009545 | Integrated circuit tester probe contact liner | Charles L. Arvin, David M. Audette, Brian M. Erwin, Grant Wagner | 2021-05-18 |
| 10670653 | Integrated circuit tester probe contact liner | Charles L. Arvin, David M. Audette, Brian M. Erwin, Grant Wagner | 2020-06-02 |
| 10663487 | Low force wafer test probe with variable geometry | David M. Audette, Marc D. Knox, Grant Wagner | 2020-05-26 |
| 10444260 | Low force wafer test probe | David M. Audette, Marc D. Knox, Grant Wagner | 2019-10-15 |
| 10261108 | Low force wafer test probe with variable geometry | David M. Audette, Marc D. Knox, Grant Wagner | 2019-04-16 |
| 9152517 | Programmable active thermal control | Harold W. Chase, James M. Crafts, David L. Gardell, Andrew T. Holle, Adrian Patrascu +1 more | 2015-10-06 |
| 7388869 | System and method for routing among private addressing domains | Matthew Butehorn, John Border, Patrick Stevens, Robert J. Torres, Vaibhav Kumar +2 more | 2008-06-17 |
| 7265561 | Device burn in utilizing voltage control | Roger Gamache, David L. Gardell, Marc D. Knox, Jody Van Horn | 2007-09-04 |
| 6847203 | Applying parametric test patterns for high pin count ASICs on low pin count testers | John Lafferty | 2005-01-25 |
| 6275051 | Segmented architecture for wafer test and burn-in | Thomas W. Bachelder, Dennis R. Barringer, James M. Crafts, David L. Gardell, Paul M. Gaschke +5 more | 2001-08-14 |
| 5280625 | Communication system and method for linking data terminals and their host computers through a satellite or other wide area network | David R. Howarter, Dennis Mager, Nurit Yehushua | 1994-01-18 |
| 4751656 | Method for choosing replacement lines in a two dimensionally redundant array | David R. Dewar, Robert Fonseca, Robert Wood | 1988-06-14 |