Issued Patents All Time
Showing 26–50 of 70 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10061539 | Inaccessibility status indicator | Michael K. Gschwind | 2018-08-28 |
| 9785435 | Floating point instruction with selectable comparison attributes | Jonathan D. Bradbury, Michael K. Gschwind, Silvia M. Mueller, Eric M. Schwarz | 2017-10-10 |
| 9727336 | Fine-grained instruction enablement at sub-function granularity based on an indicated subrange of registers | Michael K. Gschwind, Valentina Salapura | 2017-08-08 |
| 9727337 | Fine-grained instruction enablement at sub-function granularity based on an indicated subrange of registers | Michael K. Gschwind, Valentina Salapura | 2017-08-08 |
| 9727353 | Simultaneously capturing status information for multiple operating modes | Michael K. Gschwind | 2017-08-08 |
| 9703721 | Processing page fault exceptions in supervisory software when accessing strings and similar data structures using normal load instructions | Michael K. Gschwind | 2017-07-11 |
| 9690509 | Computer instructions for limiting access violation reporting when accessing strings and similar data structures | Michael K. Gschwind, Raul E. Silvera | 2017-06-27 |
| 9678886 | Processing page fault exceptions in supervisory software when accessing strings and similar data structures using normal load instructions | Michael K. Gschwind | 2017-06-13 |
| 9600282 | Endian-mode-independent memory access in a bi-endian-mode processor architecture | Michael K. Gschwind | 2017-03-21 |
| 9569127 | Computer instructions for limiting access violation reporting when accessing strings and similar data structures | Michael K. Gschwind, Raul E. Silvera | 2017-02-14 |
| 9507595 | Execution of multi-byte memory access instruction specifying endian mode that overrides current global endian mode | Michael K. Gschwind | 2016-11-29 |
| 9411585 | Multi-addressable register files and format conversions associated therewith | Michael K. Gschwind | 2016-08-09 |
| 9395981 | Multi-addressable register files and format conversions associated therewith | Michael K. Gschwind | 2016-07-19 |
| 8918623 | Implementing instruction set architectures with non-contiguous register file specifiers | Michael K. Gschwind, Robert K. Montoye, John-David Wellman | 2014-12-23 |
| 8893079 | Methods for generating code for an architecture encoding an extended register specification | Michael K. Gschwind, Robert K. Montoye, John-David Wellman | 2014-11-18 |
| 8893095 | Methods for generating code for an architecture encoding an extended register specification | Michael K. Gschwind, Robert K. Montoye, John-David Wellman | 2014-11-18 |
| 8458442 | Method and structure of using SIMD vector architectures to implement matrix multiplication | Alexandre E. Eichenberger, Michael K. Gschwind, John A. Gunnels, Fred Gehrung Gustavson | 2013-06-04 |
| 8386712 | Structure for supporting simultaneous storage of trace and standard cache lines | Gordon Taylor Davis, Richard W. Doing, John D. Jabusch, M V V Anil Krishna, Eric F. Robinson +2 more | 2013-02-26 |
| 8312424 | Methods for generating code for an architecture encoding an extended register specification | Michael K. Gschwind, Robert K. Montoye, John-David Wellman | 2012-11-13 |
| 8166281 | Implementing instruction set architectures with non-contiguous register file specifiers | Michael K. Gschwind, Robert K. Montoye, John-David Wellman | 2012-04-24 |
| 7996618 | Apparatus and method for using branch prediction heuristics for determination of trace formation readiness | Gordon Taylor Davis, Richard W. Doing, John D. Jabusch, M V V Anil Krishna, Eric F. Robinson +2 more | 2011-08-09 |
| 7934081 | Apparatus and method for using branch prediction heuristics for determination of trace formation readiness | Gordon Taylor Davis, Richard W. Doing, John D. Jabusch, M V V Anil Krishna, Eric F. Robinson +2 more | 2011-04-26 |
| 7877582 | Multi-addressable register file | Michael K. Gschwind | 2011-01-25 |
| 7849294 | Sharing data in internal and memory representations with dynamic data-driven conversion | Michael K. Gschwind | 2010-12-07 |
| 7836287 | Reducing the fetch time of target instructions of a predicted taken branch instruction | Richard W. Doing, Kenichi Tsuchiya | 2010-11-16 |