BO

Brett Olsson

IBM: 70 patents #1,048 of 70,183Top 2%
Motorola: 3 patents #3,303 of 12,470Top 30%
Apple: 2 patents #9,168 of 18,612Top 50%
📍 Cary, NC: #47 of 3,681 inventorsTop 2%
🗺 North Carolina: #314 of 45,564 inventorsTop 1%
Overall (All Time): #29,294 of 4,157,543Top 1%
70
Patents All Time

Issued Patents All Time

Showing 51–70 of 70 patents

Patent #TitleCo-InventorsDate
7793081 Implementing instruction set architectures with non-contiguous register file specifiers Michael K. Gschwind, Robert K. Montoye, John-David Wellman 2010-09-07
7644233 Apparatus and method for supporting simultaneous storage of trace and standard cache lines Gordon Taylor Davis, Richard W. Doing, John D. Jabusch, M V V Anil Krishna, Eric F. Robinson +2 more 2010-01-05
7610449 Apparatus and method for saving power in a trace cache Gordon Taylor Davis, Richard W. Doing, John D. Jabusch, M V V Anil Krishna, Eric F. Robinson +2 more 2009-10-27
7437543 Reducing the fetch time of target instructions of a predicted taken branch instruction Richard W. Doing, Kenichi Tsuchiya 2008-10-14
7421566 Implementing instruction set architectures with non-contiguous register file specifiers Michael K. Gschwind, Robert K. Montoye, John-David Wellman 2008-09-02
6343337 Wide shifting in the vector permute unit Pradeep Kumar Dubey, Charles P. Roth, Keith Everett Diefendorf, Ronald Ray Hochsprung, Hunter Ledbetter Scales, III 2002-01-29
6334176 Method and apparatus for generating an alignment control vector Hunter Ledbetter Scales, III, Keith E. Diefendorff, Pradeep Kumar Dubey, Ronald Ray Hochsprung 2001-12-25
6327651 Wide shifting in the vector permute unit Pradeep Kumar Dubey, Charles P. Roth, Keith Everett Diefendorf, Ronald Ray Hochsprung, Hunter Ledbetter Scales, III 2001-12-04
6298365 Method and system for bounds comparator Pradeep Kumar Dubey, Ronald Ray Hochsprung, Hunter Ledbetter Scales, III, Keith E. Diefendorff 2001-10-02
6282628 Method and system for a result code for a single-instruction multiple-data predicate compare operation Pradeep Kumar Dubey, Ronald Ray Hochsprung, Hunter Ledbetter Scales, III, Keith E. Diefendorff 2001-08-28
6202130 Data processing system for processing vector data and method therefor Hunter Ledbetter Scales, III, Keith E. Diefendorff, Pradeep Kumar Dubey, Ronald Ray Hochsprung, Bradford Byron Beavers +4 more 2001-03-13
6202141 Method and apparatus for performing vector operation using separate multiplication on odd and even data elements of source vectors Keith E. Diefendorff, Pradeep Kumar Dubey, Ronald Ray Hochsprung, Hunter Ledbetter Scales, III 2001-03-13
5996057 Data processing system and method of permutation with replication within a vector register file Hunter Ledbetter Scales, III, Keith E. Diefendorff, Pradeep Kumar Dubey, Ronald Ray Hochsprung 1999-11-30
5890222 Method and system for addressing registers in a data processing unit in an indirect addressing mode Ramesh Chandra Agarwal, John Joseph Forrest, Fred Gehrung Gustavson, Mark A. Johnson 1999-03-30
5887183 Method and system in a data processing system for loading and storing vectors in a plurality of modes Ramesh Chandra Agarwal, Randall Dean Groves, Fred Gehrung Gustavson, Mark A. Johnson, Terry L Lyon +1 more 1999-03-23
5832533 Method and system for addressing registers in a data processing unit in an indexed addressing mode Ramesh Chandra Agarwal, Fred Gehrung Gustavson, Mark A. Johnson 1998-11-03
5825677 Numerically intensive computer accelerator Ramesh Chandra Agarwal, Randall Dean Groves, Fred Gehrung Gustavson, Mark A. Johnson 1998-10-20
5758176 Method and system for providing a single-instruction, multiple-data execution unit for performing single-instruction, multiple-data operations within a superscalar data processing system Ramesh Chandra Agarwal, Randall Dean Groves, Fred Gehrung Gustavson, Mark A. Johnson 1998-05-26
5680338 Method and system for vector processing utilizing selected vector elements Ramesh Chandra Agarwal, Randall Dean Groves, Fred Gehrung Gustavson, Mark A. Johnson, James B. Shearer 1997-10-21
5513366 Method and system for dynamically reconfiguring a register file in a vector processor Ramesh Chandra Agarwal, Randall Dean Groves, Fred Gehrung Gustavson, Mark A. Johnson 1996-04-30