BB

Bartholomew Blaner

IBM: 103 patents #529 of 70,183Top 1%
Globalfoundries: 2 patents #1,397 of 4,424Top 35%
📍 Underhill Center, VT: #1 of 15 inventorsTop 7%
🗺 Vermont: #50 of 4,968 inventorsTop 2%
Overall (All Time): #12,952 of 4,157,543Top 1%
106
Patents All Time

Issued Patents All Time

Showing 76–100 of 106 patents

Patent #TitleCo-InventorsDate
7519793 Facilitating inter-DSP data communications Youseff Abdelilah, Gordon Taylor Davis, Jeffrey H. Derby, Joseph Garvey, Malcolm S. Ware +1 more 2009-04-14
7325122 Facilitating inter-DSP data communications Youseff Abdelilah, Gordon Taylor Davis, Jeffrey H. Derby, Joseph Garvey, Malcolm S. Ware +1 more 2008-01-29
6857065 System and method for system initializating a data processing system by selecting parameters from one of a user-defined input, a serial non-volatile memory and a parallel non-volatile memory Arnold S. Tran 2005-02-15
6157981 Real time invariant behavior cache Henry Harvey Burkhart, Robert D. Herzl, Kenneth A. Lauricella, Clarence R. Ogilvie, Arnold S. Tran 2000-12-05
6029240 Method for processing instructions for parallel execution including storing instruction sequences along with compounding information in cache Stamatis Vassiliadis 2000-02-22
5737575 Interleaved key memory with multi-page key cache 1998-04-07
5732234 System for obtaining parallel execution of existing instructions in a particulr data processing configuration by compounding rules based on instruction categories Stamatis Vassiliadis 1998-03-24
5701430 Cross-cache-line compounding algorithm for scism processors Thomas L. Jeremiah 1997-12-23
5659722 Multiple condition code branching system in a multi-processor environment Larry D. Larsen 1997-08-19
5649178 Apparatus and method for storing and initializing branch prediction with selective information transfer Stamatis Vassiliadis 1997-07-15
5590348 Status predictor for combined shifter-rotate/merge unit James E. Phillips, Stamatis Vassiliadis 1996-12-31
RE35311 Data dependency collapsing hardware apparatus Stamatis Vassiliadis, James E. Phillips 1996-08-06
5515306 Processing system and method for minimum/maximum number determination Dennis R. Strouphauer 1996-05-07
5504932 System for executing scalar instructions in parallel based on control bits appended by compounding decoder Stamatis Vassiliadis, Thomas L. Jeremiah 1996-04-02
5502826 System and method for obtaining parallel existing instructions in a particular data processing configuration by compounding instructions Stamatis Vassiliadis 1996-03-26
5475853 Cache store of instruction pairs with tags to indicate parallel execution Stamatis Vassiliadis 1995-12-12
5471628 Multi-function permutation switch for rotating and manipulating an order of bits of an input data byte in either cyclic or non-cyclic mode James E. Phillips, Stamatis Vassiliadis 1995-11-28
5465377 Compounding preprocessor for cache for identifying multiple instructions which may be executed in parallel Stamatis Vassiliadis 1995-11-07
5459844 Predecode instruction compounding Richard J. Eickemeyer, Stamatis Vassiliadis 1995-10-17
5446850 Cross-cache-line compounding algorithm for scism processors Thomas L. Jeremiah 1995-08-29
5423011 Apparatus for initializing branch prediction information Stamatis Vassiliadis 1995-06-06
5386531 Computer system accelerator for multi-word cross-boundary storage access Raymond J. Eberhard, Thomas L. Jeremiah, Michael J. Mack 1995-01-31
5355460 In-memory preprocessor for compounding a sequence of instructions for parallel computer system execution Richard J. Eickemeyer, Stamatis Vassiliadis 1994-10-11
5303356 System for issuing instructions for parallel execution subsequent to branch into a group of member instructions with compoundability in dictation tag Stamatis Vassiliadis, Thomas L. Jeremiah 1994-04-12
5295249 Compounding preprocessor for cache for identifying multiple instructions which may be executed in parallel Stamatis Vassiliadis 1994-03-15