Issued Patents All Time
Showing 26–49 of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9280981 | Method and apparatus for voice control of a mobile device | Ahmed Abdelsamie, Nicholas Shane Choo, Omar George Joseph Barake, Steven Anthony Lill | 2016-03-08 |
| 9184283 | High voltage device | — | 2015-11-10 |
| 9136179 | High gain device | — | 2015-09-15 |
| 9129910 | Wafer processing | — | 2015-09-08 |
| 9111992 | Semiconductor device including an n-well structure | Jeoung Mo Koo, Purakh Raj Verma | 2015-08-18 |
| 9105502 | Integrated circuit comprising on-chip resistors with plurality of first and second terminals coupled to the resistor body | Purakh Raj Verma, Cho Khon | 2015-08-11 |
| 9099434 | High voltage device | Purakh Raj Verma, Baofu Zhu | 2015-08-04 |
| 9064894 | Stress enhanced high voltage device | Purakh Raj Verma | 2015-06-23 |
| 8912066 | Lateral double-diffused high voltage device | Purakh Raj Verma | 2014-12-16 |
| 8853022 | High voltage device | — | 2014-10-07 |
| 8853764 | Integration of low Rdson LDMOS with high sheet resistance poly resistor | Deyan Chen | 2014-10-07 |
| 8822291 | High voltage device | Purakh Raj Verma | 2014-09-02 |
| 8809150 | MOS with recessed lightly-doped drain | Purakh Raj Verma, Zhiqing Li | 2014-08-19 |
| 8802484 | Integration of germanium photo detector in CMOS processing | Purakh Raj Verma, Kah Wee Ang | 2014-08-12 |
| 8790966 | High voltage device | Purakh Raj Verma, Baofu Zhu | 2014-07-29 |
| 8507983 | High voltage device | Purakh Raj Verma | 2013-08-13 |
| 8334567 | LDMOS using a combination of enhanced dielectric stress layer and dummy gates | Sanford Chu, Yisuo Li, Purakh Raj Verma | 2012-12-18 |
| 8293614 | High performance LDMOS device having enhanced dielectric strain layer | Sanford Chu, Yisuo Li, Verma Purakh | 2012-10-23 |
| 8222130 | High voltage device | Purakh Raj Verma | 2012-07-17 |
| 8163621 | High performance LDMOS device having enhanced dielectric strain layer | Sanford Chu, Yisuo Li, Verma Purakh | 2012-04-24 |
| 7951680 | Integrated circuit system employing an elevated drain | Yisuo Li, Ming-Shuan Li, Purakh Raj Verma, Shao-fu Sanford Chu | 2011-05-31 |
| 7824968 | LDMOS using a combination of enhanced dielectric stress layer and dummy gates | Sanford Chu, Yisuo Li, Purakh Raj Verma | 2010-11-02 |
| 7570737 | Cargo security inspection method and system based on spiral scanning | Kejun Kang, Li Zhang, Zhiqiang Chen, Haifeng Hu, Yuanjing Li +4 more | 2009-08-04 |
| 7326609 | Semiconductor device and fabrication method | Purakh Raj Verma, Liang-Choo Hsia, Dong Kyun Sohn, Chew Hoe Ang, Yun Ling Tan +3 more | 2008-02-05 |